Attaining high performance communications: a vertical approach
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| Format: | Book |
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| Language: | English |
| Published: |
Boca Raton, FL. [u.a.]
CRC Press
2010
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| Subjects: | |
| Online Access: | Inhaltsverzeichnis |
| Item Description: | Includes bibliographical references and index |
| Physical Description: | XXXII, 411 S. graf. Darst. |
| ISBN: | 9781420093087 |
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| 008 | 100312s2010 |||| |||| 00||| eng d | ||
| 010 | |a 2009027266 | ||
| 020 | |a 9781420093087 |c hardcover : alk. paper |9 978-1-420-09308-7 | ||
| 035 | |a (OCoLC)426065959 | ||
| 035 | |a (DE-599)GBV605125325 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
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| 245 | 1 | 0 | |a Attaining high performance communications |b a vertical approach |c ed. by Ada Gavrilovska |
| 264 | 1 | |a Boca Raton, FL. [u.a.] |b CRC Press |c 2010 | |
| 300 | |a XXXII, 411 S. |b graf. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 650 | 0 | |a High performance computing | |
| 650 | 4 | |a High performance computing | |
| 650 | 0 | 7 | |a Hochleistungsrechnen |0 (DE-588)4532701-4 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Hochleistungsrechnen |0 (DE-588)4532701-4 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Gavrilovska, Ada |e Sonstige |0 (DE-588)1102938920 |4 oth | |
| 856 | 4 | 2 | |m Digitalisierung UB Bamberg |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018966928&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
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| adam_text | Contents
List of Figures
xiv
List of Tables
xviii
Preface
xxi
Acknowledgments
xxvii
About the Editor
xxix
List of Contributors
xxxi
1
High Performance Interconnects for Massively Parallel Sys¬
tems
1
Smtt Pakin
1.1
Introduction
............................ 1
1.2
Performance
........................... 2
1.2.1
Metrics
.......................... 3
1.2.2
Application Sensitivity to Communication Performance
3
1.2.3
Measurements on Massively Parallel Systems
..... 4
1.3
Network Topology
........................ 6
1.3.1
The Dead Topology Society
.............. 8
1.3.2
Hierarchical Networks
.................. 12
1.3.3
Hybrid Networks
..................... 13
1.3.4
Novel Topologies
..................... 15
1.4
Network Features
........................ 16
1.4.1
Programming Models
.................. 18
1.5
Future Directions
........................ 20
1.6
Chapter Summary
........................ 22
2
Commodity High Performance Interconnects
25
Dhabuleswar K.
Pania, Pavan
Balaji, Sayanian Stir, and Matthew
Jon
Koûp
2.1
Introduction
........................... 25
2.2
Overview of Past Commodity Interconnects, Features and
■Treads
.............................. 26
VII
VIU
2.3
InfiniBand
Architecture
..................... 28
2.3.1
IB
Communication
Model
................ 28
2.3.2
Overview of InfiniBand Features
............ 32
2.3.3
InfiniBand Protection and Security Features
...... 39
2.3.4
InfiniBand Management and Services
.......... 40
2.4
Existing InfiniBand Adapter« and Switches
.......... 43
2.4.1
Channel Adapters
.................... 43
2.4.2
Switches
.......................... 44
2.4.3
Wide Area Networks (WAN) and Routers
....... 45
2.5
Existing InfiniBand Software Stacks
.............. 45
2.5.1
Low-Level Interfaces
................... 45
2.5.2
ffigh-Level Interfaces
................... 46
2.5.3
Verbs Capabilities
.................... 46
2.6
Designing High-End Systems with InfiniBand: Case Studies
47
2.6.1
Case Study: Message Passing Interface
......... 47
2.6.2
Case Study: Parallel File Systems
........... 55
2.6.3
Case Study: Enterprise Data Centers
.......... 57
2.7
Current and Future Trends of InfiniBand
........... 60
3
Ethernet vs. EtherNOT
61
Wu-chun Feng and Pavan Balaji
3.1
Overview
.............................. 61
3.2
Introduction
........................... 63
3.2.1
Defining Ethernet vs. EtherNOT
............ 64
3.2.2
Forecast
.......................... 65
3.3
Background
........................... 65
3.3.1
Ethernet Background
.................. 65
3.3.2
EtherNOT Background
................. 66
3.4
Ethernet vs. EtherNOT?
.................... 67
3.4.1
Hardware and Software Convergence
.......... 67
3.4.2
överall
Performance Convergence
............ 78
3.5
Commercial Perspective
...................... 81
3.6
Concluding Remarks
...................... 82
4
System Impact of Integrated Interconnects
85
Sudh-akar YalamanchiM and Jeffrey Young
4.1
Introduction
........................... 85
4.2
Technology Trends
........................ 86
4.3
Integrateti
Interconnects
.................... 90
4.3.1
HyperTraasport
(HT)
.................. 92
4.3.2
QmckPath Interconnect (QPI)
............. 96
4.3.3
PCI Express (PCIe)
................... 98
4.3.4
Summary
.......................... 101
4.4
Caae Study: Implementation of Global Address Spaces
.... 101
4.4.1
A Dynamic Partitioned Global Address Space Model
(DPGAS)
......................... 103
4.4.2
The Implementation Path
................ 105
4.4.3
Bridge Implementation
.................. 106
4.4.4
Projected Impact of DPGAS
.............. 108
4.5
Future Trends and Expectations
................ 109
5
Network Interfaces for High Performance Computing
113
Keith Underwood, Ron Brightwell, and Scott Hemmert
5.1
Introduction
........................... 113
5.2
Network Interface Design Issues
................ 113
5.2.1
Offload vs. Onload
.................... 114
5.2.2
Short vs. Long Message Handling
........... 115
5.2.3
Interactions between Host and NIC
........... 118
5.2.4
Collectives
........................ 123
5.3
Current Approaches to Network Interface Design Issues
. . . 124
5.3.1
Quadrics QsNet
...................... 124
5.3.2
Myrinet
.......................... 125
5.3.3
InfiniBand
......................... 125
5.3.4
Seastar
.......................... 126
5.3.5
PathScale InfiniPath and Qlogic TrueScale
...... 127
5.3.6
BlueGene/L and BlueGene/P
.............. 127
5.4
Research Directions
....................... 128
5.4.1
Offload of Message Processing
.............. 128
5.4.2
Offloading Collective Operations
............ 140
5.4.3
Cache Injection
...................... 147
5.5
Summary
............................. 147
6
Network Programming Interfaces for High Performance
Computing
149
ñon,
Brightwell and Keith Underwood
6.1
Introduction
........................... 149
6.2
The Evolution of HPC Network Programming Interfaces
. . 150
6.3
Low-Level Network Programming Interfaces
.......... 151
6.3.1
InfiniBand Verbs
...................... 151
6.3.2
Deep Computing Messaging Fabric
........... 153
6.3.3
Portals
........................... 153
6.3.4
Myrinet Express (MX)
.................. 153
6.3.5
Tagged Ports (Tports)
.......- -......... 153
6.3.6
LAPI
........................... 154
6.3.7
Sockets
.......................... 154
6.4
Distinguishing Characteristics
................. 154
6.4.1
Eatłpoint
Addressing
................... 155
8.4.2
Independent Processes
.................. 155
6.4.3
Connections
........................ 156
6.4.4
Privacy
.......................... 156
6.4.5
Operating System Interaction
.............. 156
6.4.6
Data Movement Semantics
............... 157
6.4.7
Data Transfer Completion
................ 158
6.4.8
Portability
........................ 160
6.5
Supporting
MPI
......................... 160
6.5.1
Copy Blocks
....................... 160
6.5.2
Progress
.......................... 160
6.5.3
Overlap
........................... 161
6.5.4
Unexpected Messages
................... 161
6.6
Supporting SHMEM and Partitioned Global Address Space
(PGAS)
.............................. 162
6.6.1
Fence and Quiet
..................... 162
6.6.2
Synchronization and Atomics
.............. 162
6.6.3
Progress
.......................... 163
6.6.4
Scalable Addressing
................... 163
6.7
Portals
4.0 ............................ 163
6.7.1
Small Message Rate
................... 164
6.7.2
PGAS Optimizations
................... 166
6.7.3
Hardware Friendliness
.................. 166
6.7.4
New Functionality
.................... 167
7
High Performance IP-Based Transports
169
Ada
Gavrüovska
7.1
Introduction
........................... 169
7.2
Transmission Control Protocol
—
TCP
............ 170
7.2.1
TCP Origins and Future
................. 170
7.2.2
TCP ia High Speed Networks
.............. 172
7.2.3
TCP Variants
....................... 173
7.3
TCP Performance Tuning
.................... 178
7.3.1
Improving Bandwidth Utilization
............ 178
7.3.2
Reducing Host Loads
.................. 179
7.4
UDP-Based Transport Protocols
................. 181
7.5
SCTP
............................... 182
7.6
Chapter Summary
........................ 183
8
Remote Direct Memory Access and
ÏWARP
185
Definis
DabiBsawlro and Pete Wyckoff
8.1
Introduction
........................... 185
8.2
RĐMA
.............................. 186
8.2.
і
High-Level Overview of RBMA
............. 187
8.2.2
Architectural Motivations
................ 189
8.2.3
Fundamental Aspects of RBMA
............ 192
XI
8.2.4
RDMA Historical Foundations
............. 193
8.2.5
Programming Interface
.................. 194
8.2.6
Operating System Interactions
............. 196
8.3
iWARP
.............................. 199
8.3.1
High-Level Overview of
і
WARP
............. 200
8.3.2
iWARP Device History
..................201
8.3.3
iWARP Standardization
................. 202
8.3.4
Trade-Offs of Using TCP
................ 204
8.3.5
Software-Based iWARP
................. 205
8.3.6
Differences between IB and iWARP
.......... 206
8.4
Chapter Summary
........................ 207
9
Accelerating Communication Services on Multi-Core Plat¬
forms
209
Ada Gavrilovska
9.1
Introduction
........................... 209
9.2
The
Simple
Onload Approach
................ 210
9.2.1
Limitations of the Simple Onload
.......... 212
9.3
Partitioned Communication Stacks
............... 213
9.3.1
API Considerations
................... 216
9.4
Specialized Network Multi-Cores
................ 217
9.4.1
The (Original) Case for Network Processors
...... 217
9.4.2
Network Processors Features
.............. 219
9.4.3
Application Diversity
.................. 222
9.5
Toward Heterogeneous Multi-Cores
.............. 223
9.5.1
Impact on Systems Software
............... 226
9.6
Chapter Summary
........................ 228
10
Virtualized I/O
229
Ada
Gmrrüovska,
Adit Ranadive, Duttoor Rao, and
Karsten Schwan
10.1
Introduction
........................... 229
10.1.1
Virtualization Overview
................. 230
10.1.2
Challenges with I/O Virtualization
........... 232
10.1.3
I/O Virtualization Approaches
............. 233
10.2
Split Device Driver Model
................... 2,14
10.2.1
Overview
................-........ 234
10.2.2
Performance Optimization Opportunities
....... 236
10.3
Direct. Device Access Model
.................. 240
10.3.1
Multi-Queue Devices
....................241
10.3.2
Device-Level Packet Classification
........... 243
10.3.3
Signaling
......................... 244
10.3.4
IOMMIT
.......................... 244
10.4
Opportunities and Irade-Ofife
................. 245
10.4.1
Scalabilitv
......................... 245
10.4.2 Migration......................... 246
10.4.3
Higher-Level
Interfaces.................. 246
10.4.4 Monitoring and Management............. . 247
10.5
Chapter Summary........................
249
11 The Message
Passing
Interface (MPI)
251
Jeff Squyres
11.1
Introduction
............................ 251
11.1.1
Chapter Scope
....................... 251
11.1.2
MPI
Implementations
.................. 252
11.1.3
MPI
Standard Evolution
................. 254
11.1.4
Chapter Overview
.................... 255
11.2
MPI s Layer in the Network Stack
............... 255
11.2.1
OSI
Network Stack
.................... 256
11.2.2
Networks That Provide MPI-Like Interfaces
...... 256
11.2.3
Networks That Provide Non-MPI-Like Interfaces
... 257
11.2.4
Resource Management
.................. 257
11.3
Threading and
MPI
....................... 260
11.3.1
Implementation Complexity
............... 260
11.3.2
Application Simplicity
................... 261
11.3.3
Performance Implications
................ 262
11.4
Point-to-Point Communications
................ 262
11.4.1
Communication/Computation Overlap
......... 262
11.4.2
Pre-Posting Receive Buffers
............... 263
11.4.3
Persistent. Requests
.................... 265
11.4.4
Common Mistakes
.................... 267
11.5
Collective Operations
...................... 272
11.5.1
Synchronization
..................... 272
11.6
Implementation Strategies
................... 273
11.6.1
Lazy Connection Setup
................. 273
11.6.2
Registered Memory
.................... 274
11.6.3
Message Passing Progress
................ 278
11.6.4
Trade-offs
......................... 278
11.7
Chapter Summary
........................ 279
12
High Performance Event Communication
281
Greg Eisenhauer,
Matthew Wolf, Hasan Abbasi, and
Karaten Schwan
12.1
Introduction
............................ 281
12.2
Design Points
.......................... 283
12.2.1
Lessons from Previous Designs
............. 285
12.2.2
Next Generation Event Delivery
............ 286
12.3
The EVPath Architecture
.................... 287
12.3.1
Taxonomy of Stone Types
................ 289
12.3.2
Data Type Handling
................... 289
хш
12.3.3
Mobile
Functions and the Cod Language
........ 290
12.3.4
Meeting Next Generation Goals
............. 293
12.4
Performance Microbenchmarks
................. 294
12.4.1
Local Data Handling
................... 295
12.4.2
Network Operation
.................... 296
12.5
Usage Scenarios
......................... 297
12.5.1
Implementing a Full Publish/Subscribe System
.... 298
12.5.2
IFlow
........................... 300
12.5.3
I/OGraph
......................... 302
12.6
Summary
............................. 303
13
The Case of the Fast Financial Feed
305
Virat
Agarwal, Lin Duan, Lurng-Kuo Liu,
Michaele
Perrone,
Fabrizio
Petřini, Davide Pasetto. and David
Bader
13.1
Introduction ...........................
305
13.2
Market Data Processing Systems
................ 306
13.2.1
The Ticker Plant
..................... 306
13.3
Performance Requirements
................... 308
13.3.1
Skyrocketing Data Rates
................ 308
13.3.2
Low Latency Trading
.................. 308
13.3.3
High Performance Computing in the Data Center
. . . 310
13.4
The
OPRA
Case Study
...................... 311
13.4.1
OPRA Data
Encoding
.................. 312
13.4.2
Decoder Reference Implementation
........... 314
13.4.3
A Streamlined Bottom-Up Implementation
...... 315
13.4.4
High-Level Protocol Processing with DotStar
..... 316
13.4.5
Experimental Results
................... 321
13.4.6
Discussion
......................... 324
13.5
Chapter Summary
........................ 327
14
Data-Movement Approaches for HPC Storage Systems
329
Ron A. Oldfield. Todd Kordenbmck, and Patrick Widener
14.1
Introduction
........................... 329
14.2
Lustre
................................ 331
14.2.1
Lustre Networking (LNET)
............... 332
14.2.2
Optimizations for Large-Scale I/O
........... 333
14.3
Panasas
.............................. 334
14.3.1
PaiiFS Architecture
................... 335
14.3.2
Parallel NFS (pNFS)
................... 336
14.4
Parallel Virtual File System
2
(PVFS2)
............. 337
14.4.1 BMI
Design
........................ 338
14.4.2
BMÏ
Simplifies
the Client
................ 339
14.4.3 BMI
Efficiency/Performaace
.............. 340
14.4.4 BMI
Scalability
....................... 341
14.4.5
BMI
Portability
...................... 341
XIV
14.4.6
Experimental
Results ..................
342
14.5
Lightweight File Systems
.................... 345
14.5.1
Design of the
ĽWFS
RFC Mechanism
......... 345
14.5.2
LWFS RPC Implementation
.............. 346
14.5.3
Performance Analysis
.................. 348
14.6
Other MPP File Systems
.................... 349
14.7
Chapter Summary
........................ 350
14.8
Acknowledgements
.........................351
15
Network Simulation
353
George Riley
15.1
Introduction
........................... 353
15.2
Discrete Event Simulation
................... 353
15.3
Maintaining the Event List
................... 354
15.4
Modeling Routers, Links, and End Systems
.......... 355
15.5
Modeling Network Packets
................... 358
15.6
Modeling the Network Applications
.............. 359
15.7
Visualizing the Simulation
................... 360
15.8
Distributed Simulation
..................... 362
15.9
Summary
............................. 364
References
367
Index
407
List of
Figures
1.1
Comparative communication performance of Purple. Red Storm,
and Blue Gene/L
......................... 5
1.2
Network topologies used in tie ten fastest supercomputers and
the single most parallel supercomputer
............. 9
1.3
Illustrations of various network topologies
........... 10
1.4
The network hierarchy of the Roadrunner supercomputer
. . 14
1.5
Kautz graph
............................ 15
2.1
Typical InfiniBand cluster
.................... 29
2.2
Consumer queuing model
.................... 30
2.3
Virtual lanes
........................... 32
2.4
Example of unreliable multicast operation
........... 34
2.5
IB transport services
....................... 36
2.6
Layered design of MVAPICH/MVAPICH2 over IB
....... 48
2.7
Two-sided point-to-point performance over IB on a range of
adapters
.............................. 50
2.8
Application-level evaluation of
MPI
over InfiniBand design com¬
ponents
............................... 53
2.9
Lustre performance over InfiniBand
............... 56
2.10
CPU utilization in Lustre with IPoIB and native (verb-level)
protocols
.............................. »57
2.11 SDP
architecture
......................... 58
2.12
Performance comparison of the Apache Web server:
SDP
vs.
IPoIB
................................ 58
2.13
Active polling to achieve strong cache coherency.
....... 59
2.14
Active polling performance
................... 60
3.1
Profile of network interconnect« on the TOP500
........
Ш
3.2
Hand-drawn Ethernet diagram by Robert Metcalft?
.......
üti
3.3
TCP offload engines
........................ 70
3.4
iWARP protocol stack
........................ 71
3.5
Network congestion
........................ 72
3.6
YLAN-based
muitipath communication.
............ 74
3.7
Myriaet
MX-over-Etheraet.................... 76
3.8
Méllanos ConuectX
........................ 77
3.9
Ethernet vs. EtherNOT: One-wav latency-
........... 78
XVI
3.10
Ethernet vs. EtherNOT: Unidirectional bandwidth
....... 79
3.11
Ethernet vs. EtherNOT: Virtual Microscope application.
... 80
3.12
Ethernet vs. EtherNOT: MPI-tile-IO application
......... 81
4.1
Network latency scaling trends
.................. 87
4.2
Memory cost and memory power trends for a commodity server
system
............................... 88
4.3
Approximate
noorplans
for quad-core processors from AMD
and Intel
............................... 91
4.4
Breakdown of
a
HyperTransport
link
.............. 92
4.5
Organization of buffers/VCs on
a HT
link
........... 93
4.6
HT
read request packet format
.................. 95
4.7
Structure of the QPI protocol stack and link
.......... 96
4.8
QPI:s low-latency source snoop protocol
............. 97
4.9
An example of the PCIe complex
................. 99
4.10
Structure of the PCI Express packets and protocol processing
100
4.11
The Dynamic Partitioned Global Address Space model
.... 102
4.12
Memory bridge with Opteron memory subsystem
........ 105
4.13
Memory bridge stages
....................... 106
5.1
Comparing programmed I/O and DMA transactions to the
network interface
.......................... 115
5.2
Comparing messages using an eager protocol to messages using
a rendezvous protocol
....................... 116
5.3
Ping-pong bandwidth for Quadrics Man4 and 4X SDR Infini¬
Band
................................ 117
5.4
Cells in associative list processing units
............ 130
5.5
Performance advantages of an
ALPU
............... 131
5.6
NIC architecture enhanced with a list management unit.
. . . 133
5.7
Performance of the list management unit
............ 135
5.8
Microcoded match unit
..................... 136
5.9
Match unit s wide instruction word
............... 137
5.10
Match unit performance
..................... 140
5.11
NIC-based atomic unit
....................... 141
5.12
Comparing the performance with and without cache,
...... 144
5.13
Assessing the impact of size and associativity on atomic unit
cache performance
......................... 145
5.14
Pseudo
code for an Allreduce using triggered operations
. . . 146
7.1
Congestion management functions in popular TCP variants.
. 177
8.1
Comparison of traditional TCP network stack and RJDMA
. . 18?
8.2
Effect of overlapping computation and communication
..... 190
8.3
TCP and RDMA communication architecture
.......... 191
8.4
ÍWAB.P
protocols stack
...................... 202
XVII
9.1
Simple protocol
onload approach on multi-core platforms.
. . . 211
9.2
Deploying communication stacks on dedicated cores
...... 214
9.3
Deployment alternatives for network processors
........ 222
9.4
Heterogeneous multi-core platform
............... 224
10.1
Split device driver model
..................... 234
10.2
Direct device access model
..................... 241
10.3
RDMA write bandwidth divided among
VMs
......... 243
11.1
Simplistic receive processing in
MPI
.............. 264
11.2
Serialized
MPI
communication
................. 269
11.3
Communication/computation overlap
............. 270
11.4
Memory copy vs. OpenPabric memory registration times
. . 275
12.1
Channel-based event delivery system
............. 282
12.2
Complex event processing delivery system
........... 283
12.3
Event delivery system built using EVPath
.......... 288
12.4
Basic stone types
........................ 290
12.5
Sample EVPath data structure declaration
........... 291
12.6
Specialization filter for stock trades ranges
.......... 292
12.7
Specialization filter for array averaging
............ 293
12.8
Local stone transfer time for linear and tree-structured paths
295
12.9
EVPath throughput for various data sizes
........... 297
12.10
Using event channels for
communication
........... 298
12.11
ECho event, channel implementation using EVPath stones
. . 299
12.12
Derived event channel implementation using EVPath stones
300
12.13
CPU overhead as a function of filter rejection ratio
...... 301
13.1
High-level overview of a ticker plant
.............. 307
13.2
OPRA
market peak data rates
................. 309
13.3
OPRA
FAST encoded packet format
............. 314
13.4
OPRA
reference decoder
.................... 315
13.5
Bottom-up reference decoder block diagram
.......... 316
13.6
Presence and field
шар
bit
manipulation
........... 317
13.7
À
graphical representation of the DotStar compiler steps.
. . 318
13.8
DotStar runtime
......................... 319
13.9
DotStar source code
....................... 320
13.10
OPRA
message distribution
.................. 322
13.11
Performance comparison on several hardware platforms
. . . 323
14.1
Partitioned architecture
..................... 330
14.2
Lustre software stack
....................... 332
14.3
Server-directed DMA handshake in Lustre
.......... 333
14.4
Panasas DirectFlow architecture
................ 334
14.5
Parallel NFS architecture
.................... 337
XVIII
14.6
PVFS2
............................... 338
14.7
Round trip latency
....................... 342
14.8
Point-to-point bandwidth for 120MB transfer
......... 342
14.9
Aggregate read pattern, 10MB per client/server pair
..... 343
14.10
LWFS RFC protocol
...................... 346
14.11
The 16-byte data structure used for each of the experiments.
347
14.12
Comparison of LWFS RPC to various other mechanisms.
. . 349
15.1
Moderately complex network topology.
............ 358
15.2
Network simulation animation
.................. 360
15.3
Network simulation visualization
................. 361
15.4
The space-parallel method for distributed network simulation.
363
List of Tables
1.1
Network characteristics of Purple, Red Storm, and Blue Gene/L
4
1.2
Properties of a ring vs. a fully connected network of
η
nodes
7
1.3
Hypercube conference: length of proceedings
.......... 11
4.1
Latency results for HToE bridge
................. 107
4.2
Latency numbers used for evaluation of performance penalties.
107
5.1
Breakdown of the assembly code
................. 139
12.1
Comparing split stone and filter stone execution times
.... 296
13.1
OPRA
message categories with description
........... 313
13.2
Hardware platforms used during experimental evaluation.
. . 324
13.3
Detailed performance analysis (Intel
Xeon
Q6600, E5472 and
AMD Opteron
2352)....................... 325
13.4
Detailed performance analysis (SUN UltraSparc T2 and IBM
Power6)
.............................. 326
13.5
DotStar latency on different platforms
.............. 327
14.1
Compute and I/O nodes for production DOE MPP systems
used since the early
1990s......................331
XIX
|
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| illustrated | Not Illustrated |
| indexdate | 2024-07-09T22:10:58Z |
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| language | English |
| lccn | 2009027266 |
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| spelling | Attaining high performance communications a vertical approach ed. by Ada Gavrilovska Boca Raton, FL. [u.a.] CRC Press 2010 XXXII, 411 S. graf. Darst. txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index High performance computing Hochleistungsrechnen (DE-588)4532701-4 gnd rswk-swf Hochleistungsrechnen (DE-588)4532701-4 s DE-604 Gavrilovska, Ada Sonstige (DE-588)1102938920 oth Digitalisierung UB Bamberg application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018966928&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Attaining high performance communications a vertical approach High performance computing Hochleistungsrechnen (DE-588)4532701-4 gnd |
| subject_GND | (DE-588)4532701-4 |
| title | Attaining high performance communications a vertical approach |
| title_auth | Attaining high performance communications a vertical approach |
| title_exact_search | Attaining high performance communications a vertical approach |
| title_full | Attaining high performance communications a vertical approach ed. by Ada Gavrilovska |
| title_fullStr | Attaining high performance communications a vertical approach ed. by Ada Gavrilovska |
| title_full_unstemmed | Attaining high performance communications a vertical approach ed. by Ada Gavrilovska |
| title_short | Attaining high performance communications |
| title_sort | attaining high performance communications a vertical approach |
| title_sub | a vertical approach |
| topic | High performance computing Hochleistungsrechnen (DE-588)4532701-4 gnd |
| topic_facet | High performance computing Hochleistungsrechnen |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018966928&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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