Synthesis of accurate and efficient functional modelling techniques for performing design verification of very large scale integrated digital circuits and systems in a hierarchical digital logic simulation environment:
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Bibliographic Details
Main Author: Wu, Kwok-Wai (Author)
Format: Thesis Microfilm Book
Language:English
Published: 1979
Edition:[Mikrofiche-Ausg.]
Subjects:
Item Description:Includes bibliographical references (leaves 162-166)
Physical Description:V, 166 leaves graph. Darst.

There is no print copy available.

Interlibrary loan Place Request Caution: Not in THWS collection!