Embedded media processing:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Amsterdam [u.a.]
Elsevier [u.a.]
2006
|
| Schriftenreihe: | Embedded technology series
|
| Schlagworte: | |
| Online-Zugang: | Table of contents only Publisher description Inhaltsverzeichnis |
| Beschreibung: | XXXI, 389 S. Ill. 1 CD-ROM (12 cm) |
| ISBN: | 0750679123 9780750679121 |
Internformat
MARC
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| 010 | |a 2005013672 | ||
| 020 | |a 0750679123 |c pbk. : alk. paper |9 0-7506-7912-3 | ||
| 020 | |a 9780750679121 |9 978-0-7506-7912-1 | ||
| 035 | |a (OCoLC)60421201 | ||
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| 044 | |a xxu |c US | ||
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| 084 | |a ZN 6040 |0 (DE-625)157496: |2 rvk | ||
| 100 | 1 | |a Katz, David J. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Embedded media processing |c by David J. Katz and Rick Gentile |
| 264 | 1 | |a Amsterdam [u.a.] |b Elsevier [u.a.] |c 2006 | |
| 300 | |a XXXI, 389 S. |b Ill. |e 1 CD-ROM (12 cm) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Embedded technology series | |
| 650 | 7 | |a Computergeheugen |2 gtt | |
| 650 | 7 | |a Embedded systems |2 gtt | |
| 650 | 7 | |a Multimedia |2 gtt | |
| 650 | 7 | |a Signaalverwerking |2 gtt | |
| 650 | 4 | |a Signal processing |x Digital techniques | |
| 650 | 4 | |a Embedded computer systems | |
| 650 | 0 | 7 | |a Digitale Signalverarbeitung |0 (DE-588)4113314-6 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Eingebettetes System |0 (DE-588)4396978-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Multimedia |0 (DE-588)4192358-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Multimedia |0 (DE-588)4192358-3 |D s |
| 689 | 0 | 1 | |a Eingebettetes System |0 (DE-588)4396978-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Digitale Signalverarbeitung |0 (DE-588)4113314-6 |D s |
| 689 | 1 | |5 DE-604 | |
| 700 | 1 | |a Gentile, Rick |e Verfasser |4 aut | |
| 856 | 4 | |u http://www.loc.gov/catdir/toc/ecip0513/2005013672.html |3 Table of contents only | |
| 856 | 4 | |u http://www.loc.gov/catdir/enhancements/fy0622/2005013672-d.html |3 Publisher description | |
| 856 | 4 | 2 | |m GBV Datenaustausch |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016731955&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-016731955 | ||
Datensatz im Suchindex
| _version_ | 1804138008761335808 |
|---|---|
| adam_text | CONTENTS PREFACE XIX HISTORY OF THIS BOOK XIX CHAPTER OVERVIEWS XX
CHAPTER 1: EMBEDDED MEDIA PROCESSING XX CHAPTER 2: MEMORY SYSTEMS XX
CHAPTER 3: DIRECT MEMORY ACCESS (DMA) XXI CHAPTER 4: SYSTEM RESOURCE
PARTITIONING AND CODE OPTIMIZATION XXI CHAPTER 5: BASICS OF EMBEDDED
AUDIO PROCESSING XXI CHAPTER 6: BASICS OF EMBEDDED VIDEO AND IMAGE
PROCESSING XXI CHAPTER 7: MEDIA PROCESSING FRAMEWORKS XXII CHAPTER 8:
POWER MANAGEMENT FOR EMBEDDED SYSTEMS XXII CHAPTER 9: APPLICATION
EXAMPLES XXIII ACKNOWLEDGMENTS XXIII ACRONYMS XXV ABOUT THE AUTHORS XXIX
WHAT S ON THE CD-ROM? XXXI CHAPTER 1: EMBEDDED MEDIA PROCESSING 1 WHY
ARE YOU READING THIS BOOK? 1 SO WHAT S ALL THE EXCITEMENT ABOUT EMBEDDED
MULTIMEDIA SYSTEMS? 2 A SIMPLIFIED LOOK AT A MEDIA PROCESSING SYSTEM 4
CORE PROCESSING 4 INPUT/OUTPUT SUBSYSTEMS*PERIPHERAL INTERFACES 6
SUBSYSTEM CONTROL 6 STORAGE 8 VII CONTENTS CONNECTIVITY 9 DATA MOVEMENT
10 MEMORY SUBSYSTEM 11 LAYING THE GROUNDWORK FOR AN EMP APPLICATION 11
WHAT KIND(S) OF MEDIA AM I DEALING WITH? 12 WHAT DO I NEED TO DO WITH
THE DATA? 12 ARE MY SYSTEM NEEDS LIKELY TO CHANGE OVER TIME, OR WILL
THIS BE A STATIC SYSTEM? 12 ISTHIS A PORTABLE APPLICATION? 12 DOES MY
APPLICATION REQUIRE A FIXED-POINT OR FLOATING-POINT DEVICE? 13 HOW DOES
THE DATA GET INTO AND/OR OUT OF THE CHIP? 14 HOW DO I DEVELOP ON THE
PROCESSOR? 14 DO 1 NEED AN OPERATING SYSTEM? 14 WHAT ARE THE DIFFERENT
WAYS TO BENCHMARK A PROCESSOR? 15 HOW MUCH AM I WILLING TO SPEND? 16 OK,
SO WHAT PROCESSOR CHOICES DO I HAVE? 17 ASICANDASSP 17 FPGA
(FIELD-PROGRAMMABLE GATE ARRAY) 18 MCU 19 DSP 22 DISCRETE DSP + MCU 23
CONVERGENT PROCESSOR 24 A LOOK INSIDE THE BLACKFIN PROCESSOR 26 SYSTEM
VIEW 27 COMPUTATIONAL UNITS 28 MEMORY MODEL 29 DMA 30 INSTRUCTION FLOW
30 EVENT HANDLER 31 PROTECTION OF RESOURCES 32 PROGRAMMING MODEL 32
POWER MANAGEMENT 33 WHAT SNEXT? 35 CHAPTER 2: MEMORY SYSTEMS 37
INTRODUCTION 37 MEMORY SPACES 38 LI INSTRUCTION MEMORY 40 USING LI
INSTRUCTION MEMORY FOR DATA PLACEMENT 40 VI/7 CONTENTS LI DATA MEMORY 41
CACHE OVERVIEW 42 WHATLS CACHE? 42 DIRECT-MAPPED CACHE 45 FULLY
ASSOCIATIVE CACHE 45 N-WAY SET-ASSOCIATIVE CACHE 46 MORE CACHE DETAILS
46 WRITE-THROUGH AND WRITE-BACK DATA CACHE 49 MORE CACHE IN OUR FUTURE
51 EXTERNAL MEMORY 51 SYNCHRONOUS MEMORY 52 SDRAM 52 CASLATENCY 57
REFRESHING THE SDRAM 58 MOBILE SDRAM 59 DOUBLE DATA RATE (DDR)
SDRAM/DDR1 60 DDR2 SDRAM 61 ASYNCHRONOUS MEMORY 62 NONVOLATILE MEMORIES
65 NAND AND NOR FLASH MEMORIES 66 HARD DISK STORAGE*IDE, ATA AND ATAPI
70 OTHER HARD DRIVE INTERFACES 71 SERIAL ATA (SATA) 71 SCSI 72
MICRODRIVE 72 USB/FIREWIRE 72 EMERGING NONVOLATILE MEMORY TECHNOLOGIES
73 WHAT SNEXT? 73 CHAPTER 3: DIRECT MEMORY ACCESS 75 INTRODUCTION 75 DMA
CONTROLLER OVERVIEW 76 MORE ON THE DMA CONTROLLER 78 PROGRAMMING THE DMA
CONTROLLER 80 DMA CLASSIFICATIONS 92 REGISTER-BASED DMA 92
DESCRIPTOR-BASED DMA 95 DESCRIPTOR MANAGEMENT 96 ADVANCED DMA FEATURES
99 IX CONTENTS SYSTEM PERFORMANCE TUNING 99 EXTERNAL DMA 100 WHAT S
NEXT? 101 CHAPTER 4: SYSTEM RESOURCE PARTITIONING AND CODE OPTIMIZATION
703 INTRODUCTION 103 EVENT GENERATION AND HANDLING 104 SYSTEM INTERRUPTS
104 PROGRAMMING METHODOLOGY 107 ARCHITECTURAL FEATURES FOR EFFICIENT
PROGRAMMING 108 MULTIPLE OPERATIONS PER CYCLE 109 HARDWARE LOOP
CONSTRUCTS 110 SPECIALIZED ADDRESSING MODES 112 BYTE ADDRESSABILITY 112
CIRCULAR BUFFERING 112 BIT REVERSAL 115 INTERLOCKED INSTRUCTION
PIPELINES 116 COMPILER CONSIDERATIONS FOR EFFICIENT PROGRAMMING 119
CHOOSING DATATYPES 120 ARRAYS VERSUS POINTERS 120 DIVISION 121 LOOPS 121
DATA BUFFERS 123 INTRINSICS AND IN-LINING 123 VOLATILE DATA 125 SYSTEM
AND CORE SYNCHRONIZATION 125 LOAD/STORE SYNCHRONIZATION 126 ORDERING 126
ATOMIC OPERATIONS 129 MEMORY ARCHITECTURE*THE NEED FOR MANAGEMENT 129
MEMORY ACCESS TRADEOFFS 129 INSTRUCTION MEMORY MANAGEMENT*TO CACHE ORTO
DMA? 131 DATA MEMORY MANAGEMENT 132 WHAT ABOUT DATA CACHE? 133 SYSTEM
GUIDELINES FOR CHOOSING BETWEEN DMA AND CACHE 135 INSTRUCTION CACHE,
DATA DMA 135 INSTRUCTION CACHE, DATA DMA/CACHE 136 INSTRUCTION DMA, DATA
DMA 136 MEMORY MANAGEMENT UNIT (MMU) 140 X CONTENTS CPLB MANAGEMENT 140
MEMORY TRANSLATION 141 PHYSICS OF DATA MOVEMENT 141 GROUPING LIKE
TRANSFERS TO MINIMIZE MEMORY BUS TURNAROUNDS 142 UNDERSTANDING CORE AND
DMA SDRAM ACCESSES 144 KEEPING SDRAM ROWS OPEN AND PERFORMING MULTIPLE
PASSES ON DATA 145 OPTIMIZING THE SYSTEM CLOCK SETTINGS AND ENSURING
REFRESH RATES ARE TUNED FOR THE SPEED AT WHICH SDRAM RUNS 147 EXPLOITING
PRIORITY AND ARBITRATION SCHEMES BETWEEN SYSTEM RESOURCES 148
WHAT SNEXT? 148 CHAPTER 5: BASICS OF EMBEDDED AUDIO PROCESSING 749
INTRODUCTION 149 WHAT IS SOUND? 149 AUDIO SIGNALS 151 SPEECH PROCESSING
152 AUDIO SOURCES AND SINKS 152 CONVERTING BETWEEN ANALOG AND DIGITAL
AUDIO SIGNALS 152 BACKGROUND ON AUDIO CONVERTERS 155 AUDIO ADCS 155
AUDIO DACS 156 CONNECTING TO AUDIO CONVERTERS 156 ANADCEXAMPLE 156 PS
(INTER-IC-SOUND) 158 SPI (SERIAL PERIPHERAL INTERFACE) 158 DACS AND
CODECS 159 AC 97 (AUDIO CODEC 97) 159 SPEECH CODECS 160 PWM OUTPUT 160
INTERCONNECTIONS 160 CONNECTORS 161 DIGITAL CONNECTIONS 161 DYNAMIC
RANGE AND PRECISION 162 NUMERIC FORMATS FOR AUDIO 166 FIXED-POINT
ARITHMETIC 168 FLOATING-POINT ARITHMETIC 168 EMULATION ON 16-BIT
ARCHITECTURES 170 FLOATING-POINT EMULATION ON FIXED-POINT PROCESSORS 171
DOUBLE-PRECISION FIXED-POINT EMULATION 171 XI CONTENTS 32-BIT-ACCURATE
EMULATION 171 31-BIT-ACCURATE EMULATION 173 AUDIO PROCESSING METHODS 174
GETTING DATA TO THE PROCESSOR S CORE 174 BLOCK PROCESSING VERSUS SAMPLE
PROCESSING 174 DOUBLE-BUFFERING 174 2DDMA 176 BASIC OPERATIONS 176
SIGNAL GENERATION 178 FILTERING AND ALGORITHMS 178 FINITE IMPULSE
RESPONSE (FIR) FILTER 178 INFINITE IMPULSE RESPONSE (HR) FILTER 179 FAST
FOURIER TRANSFORM 179 SAMPLE RATE CONVERSION 180 AUDIO COMPRESSION 181
MP3 ]L83 AAC 183 AC-3 183 WMA 183 REAL AUDIO 184 VORBIS 184 FLAC 184
SPEECH COMPRESSION 184 GSM I IL85 THE G-DOT STANDARDS 186 G.711 186
G.723.1 186 G.729 187 SPEEX 187 WHAT S NEXT? 187 CHAPTER 6: BASICS OF
EMBEDDED VIDEO AND IMAGE PROCESSING 189 INTRODUCTION 189 HUMAN VISUAL
PERCEPTION 189 WHAT S A VIDEO SIGNAL? 191 BROADCAST TV*NTSC AND PAL 193
VIDEO RESOLUTION 193 INTERLACED VERSUS PROGRESSIVE SCANNING 194 COLOR
SPACES 195 XII CONTENTS GAMMA CORRECTION 196 CHROMA SUBSAMPLING 198
DIGITAL VIDEO 201 ITU-RBT.601 (FORMERLYCCIR-601) 202 ITU-R BT.656
(FORMERLY CCIR-656) 202 A SYSTEMS VIEW OF VIDEO 206 VIDEO SOURCES 207
ANALOG VIDEO SOURCES 207 DIGITAL VIDEO SOURCES 208 CCDS AND CMOS SENSORS
208 BAYER PATTERN 208 CONNECTING TO IMAGE SENSORS 211 IMAGE PIPE 211
VIDEO DISPLAYS 214 ANALOG VIDEO DISPLAYS 214 VIDEO ENCODER 214 CATHODE
RAY TUBES (CRTS) 216 DIGITAL VIDEO DISPLAYS 217 LIQUID CRYSTAL DISPLAY
(LCD) PANELS 217 OLED (ORGANIC LIGHT-EMITTING DIODE) DISPLAYS 219
EMBEDDED VIDEO PROCESSING CONSIDERATIONS 219 VIDEO PORT FEATURES 219
PACKING 221 POSSIBLE DATA FLOWS 222 VIDEO ALUS 223 DMA CONSIDERATIONS
227 PLANAR VERSUS INTERLEAVED BUFFER FORMATS 228 DOUBLE-BUFFERING 228
CLASSIFICATION OF VIDEO ALGORITHMS 229 BANDWIDTH CALCULATIONS 230 SAMPLE
VIDEO APPLICATION WALK-THROUGH 231 DEINTERLACING 232 SCAN RATE
CONVERSION 233 PIXEL PROCESSING 234 2D CONVOLUTION 235 DEALING WITH
IMAGE BOUNDARIES 236 CHROMA RESAMPLING, GAMMA CORRECTION AND COLOR
CONVERSION 237 SCALING AND CROPPING 238 INCREASING OR DECREASING PIXELS
PER ROW 238 XIII CONTENTS INCREASING OR REDUCING LINES PER FRAME 239
DISPLAY PROCESSING 239 ALPHA BLENDING 239 COMPOSITING 240 CHROMA KEYING
240 ROTATION 240 OUTPUT FORMATTING 241 COMPRESSION/DECOMPRESSION 241
LOSSLESS VERSUS LOSSY COMPRESSION 242 IMAGE COMPRESSION 243 BMP 243 GIF
244 PNG 244 JPEG 244 JPEG2000 244 VIDEO COMPRESSION 245 MOTION JPEG
(M-JPEG) 246 H.261 247 MPEG-1 247 MPEG-2 247 H.263 248 MPEG-4 248 DV 248
QUICKTIME 249 REALVIDEO 249 WINDOWS MEDIA VIDEO (WMV)/VC-1 249 THEORA
249 H.264 249 ENCODING/DECODING ON AN EMP 250 TRANSCODING 251
WHAT SNEXT? 252 CHAPTER 7: MEDIA PROCESSING FRAMEWORKS 253 INTRODUCTION
253 WHAT IS A FRAMEWORK? 254 DEFINING YOUR FRAMEWORK 255 THE APPLICATION
TIMELINE 256 EVALUATING BANDWIDTH 257 PROCESSOR BANDWIDTH 260 XIV
CONTENTS DMA BANDWIDTH 261 MEMORY BANDWIDTH 261 ASYMMETRIE AND SYMMETRIE
DUAL-CORE PROEESSORS 264 PROGRAMMING MODELS 265 ASYMMETRIE PROGRAMMING
MODEL 265 HOMOGENEOUS PROGRAMMING MODEL 267 MASTER-SLAVE PROGRAMMING
MODEL 268 PIPELINED PROGRAMMING MODEL 269 STRATEGIES FOR ARCHITECTING A
FRAMEWORK 270 PROCESSING DATA ON-THE-FLY 270 PROGRAMMING EASE TRUMPS
PERFORMANCE 273 PERFORMANCE-BASED FRAMEWORK 276 IMAGE PIPE AND
COMPRESSION EXAMPLE 277 HIGH PERFORMANCE DECODER EXAMPLE 278 FRAMEWORK
TIPS 282 OTHER TOPICS IN MEDIA FRAMEWORKS 283 AUDIO-VIDEO
SYNCHRONIZATION 283 MANAGING SYSTEM FLOW 285 FRAMEWORKS AND ALGORITHM
COMPLEXITY 289 WHAT SNEXT? 289 CHAPTER 8: POWER MANAGEMENT FOR EMBEDDED
SYSTEMS 297 INTRODUCTION 291 A PROCESSOR S VIEW OF POWER 292 INPUTCLOCK
293 PHASE-LOCKED LOOP (PLL) 293 FREQUENCY, VOLTAGE AND POWER 294
PROCESSOR POWER MODES 297 FULL-ONMODE 298 ACTIVE MODE 298 SLEEPMODE 298
DEEP-SLEEP MODE 299 HIBERNATE MODE 299 TAKING ADVANTAGE OF POWER MODES
299 POWER DOMAINS 301 OTHER CONSIDERATIONS 302 POWER-FRIENDLY
ARCHITECTURES 302 SYMMETRIE MULTIPROCESSING 302 SOFTWARE TOOLS 303 XV
CONTENTS VOLTAGE REGULATION 303 LINEAR REGULATORS 304 SWITCHING
REGULATORS 305 STEP-DOWN SWITCHING REGULATOR 306 EFFICIENCY 3 JG
COMPONENT SELECTION FOR STEP-DOWN REGULATORS 311 SCHOTTKY DIODE AND FET
SWITCH 31 J INDUCTOR CONSIDERATIONS 3)2 INDUCTANCE VALUE 3]2
SATURATION CURRENT 313 DC RESISTANCE 3 J4 SELF-RESONANT FREQUENCY 3]4
CAPACITOR CONSIDERATIONS 314 TECHNOLOGY/CONSTRUCTION 314 CAPACITANCE
VALUE 3^4 RIPPLE CURRENT ^16 INPUT AND OUTPUT FILTERING 315 SWITCHING
FREQUENCY 3J7 CALCULATING SYSTEM POWER 3JG AVERAGE POWER DISSIPATION 31G
AVERAGE INTERNAL POWER CONSUMPTION 3 J 9 AVERAGE EXTERNAL POWER
DISSIPATION 320 BATTERY FUNDAMENTALS 32] PRIMARY BATTERIES 322 ALKALINE
32? LITHIUM 323 SILVER OXIDE 323 ZINC AIR 323 RECHARGEABLE BATTERIES 323
NICKEL CADMIUM (NICD) 323 NICKEL METAL HYDRIDE (NIMH) 323 LITHIUM ION
(LI+ OR LI-ION) 324 LITHIUM POLYMER 324 RELATIVE POWER FOR EXTERNAL
DEVICES 326 CHAPTER 9: APPLICATION EXAMPLES 327 INTRODUCTION 327
AUTOMOTIVE DRIVER ASSISTANCE 328 AUTOMOTIVE SAFETY SYSTEMS 328 XVI
CONTENTS SMART AIRBAGS 328 COLLISION AVOIDANCE AND ADAPTIVE CRUISE
CONTROL 329 LANE DEPARTURE*A SYSTEM EXAMPLE 331 IMAGE ACQUISITUM 333
MEMORY AND DATA MOVEMENT 333 PROJECTION CORRECTION 336 IMAGE FILTERING
336 EDGE DETECTION 338 STRAIGHT LINE DETECTION*HOUGH TRANSFORM 339 LANE
TRACKING 342 DECISION MAKING 343 BASELINE JPEG COMPRESSION OVERVIEW 344
PREPROCESSING 344 COLOR SPACE 344 SPATIAL FILTERING 345 DISCRETE COSINE
TRANSFORM (DCT) 346 QUANTIZATION 347 ZIGZAG SORTING 348 CODING THE DC
COEFFICIENTS 349 CODING THE AC COEFFICIENTS (RUN-LENGTH CODING) 350
ENTROPY ENCODING 350 HUFFMAN CODING 351 JPEG FILE INTERCHANGE FORMAT
(JFIF) 352 MPEG-2 ENCODING 353 MOTION ESTIMATION/COMPENSATION 354 FRAME
TYPES 356 FORMAT CONVERSION 357 MPEG-2 ENCODER FRAMEWORKS 359 CODE
OPTIMIZATION STUDY USING OPEN-SOURCE ALGORITHMS 363 WHAT IS OPEN SOURCE?
363 WHATLSOGG? 363 WHAT IS VORBIS? 364 WHATLSSPEEX? 366 OPTIMIZING
VORBIS AND SPEEX ON BLACKFIN 366 COMPILER OPTIMIZATION 368 SYSTEM
OPTIMIZATION 370 INSTRUCTION EXECUTION 370 DATA MANAGEMENT 371 ASSEMBLY
OPTIMIZATION 372 XVII CONTENTS APPENDIX: SOURCES AND FURTHER READING 373
CHAPTER 1 373 CHAPTER 2 373 CHAPTER 3 374 CHAPTER 4 3-74 CHAPTER 5 3-74
CHAPTER 6 375 CHAPTER 7 377 CHAPTER 8 377 CHAPTER 9 37G INDEX 379 XVIII
|
| adam_txt |
CONTENTS PREFACE XIX HISTORY OF THIS BOOK XIX CHAPTER OVERVIEWS XX
CHAPTER 1: EMBEDDED MEDIA PROCESSING XX CHAPTER 2: MEMORY SYSTEMS XX
CHAPTER 3: DIRECT MEMORY ACCESS (DMA) XXI CHAPTER 4: SYSTEM RESOURCE
PARTITIONING AND CODE OPTIMIZATION XXI CHAPTER 5: BASICS OF EMBEDDED
AUDIO PROCESSING XXI CHAPTER 6: BASICS OF EMBEDDED VIDEO AND IMAGE
PROCESSING XXI CHAPTER 7: MEDIA PROCESSING FRAMEWORKS XXII CHAPTER 8:
POWER MANAGEMENT FOR EMBEDDED SYSTEMS XXII CHAPTER 9: APPLICATION
EXAMPLES XXIII ACKNOWLEDGMENTS XXIII ACRONYMS XXV ABOUT THE AUTHORS XXIX
WHAT'S ON THE CD-ROM? XXXI CHAPTER 1: EMBEDDED MEDIA PROCESSING 1 WHY
ARE YOU READING THIS BOOK? 1 SO WHAT'S ALL THE EXCITEMENT ABOUT EMBEDDED
MULTIMEDIA SYSTEMS? 2 A SIMPLIFIED LOOK AT A MEDIA PROCESSING SYSTEM 4
CORE PROCESSING 4 INPUT/OUTPUT SUBSYSTEMS*PERIPHERAL INTERFACES 6
SUBSYSTEM CONTROL 6 STORAGE 8 VII CONTENTS CONNECTIVITY 9 DATA MOVEMENT
10 MEMORY SUBSYSTEM 11 LAYING THE GROUNDWORK FOR AN EMP APPLICATION 11
WHAT KIND(S) OF MEDIA AM I DEALING WITH? 12 WHAT DO I NEED TO DO WITH
THE DATA? 12 ARE MY SYSTEM NEEDS LIKELY TO CHANGE OVER TIME, OR WILL
THIS BE A STATIC SYSTEM? 12 ISTHIS A PORTABLE APPLICATION? 12 DOES MY
APPLICATION REQUIRE A FIXED-POINT OR FLOATING-POINT DEVICE? 13 HOW DOES
THE DATA GET INTO AND/OR OUT OF THE CHIP? 14 HOW DO I DEVELOP ON THE
PROCESSOR? 14 DO 1 NEED AN OPERATING SYSTEM? 14 WHAT ARE THE DIFFERENT
WAYS TO BENCHMARK A PROCESSOR? 15 HOW MUCH AM I WILLING TO SPEND? 16 OK,
SO WHAT PROCESSOR CHOICES DO I HAVE? 17 ASICANDASSP 17 FPGA
(FIELD-PROGRAMMABLE GATE ARRAY) 18 MCU 19 DSP 22 DISCRETE DSP + MCU 23
CONVERGENT PROCESSOR 24 A LOOK INSIDE THE BLACKFIN PROCESSOR 26 SYSTEM
VIEW 27 COMPUTATIONAL UNITS 28 MEMORY MODEL 29 DMA 30 INSTRUCTION FLOW
30 EVENT HANDLER 31 PROTECTION OF RESOURCES 32 PROGRAMMING MODEL 32
POWER MANAGEMENT 33 WHAT'SNEXT? 35 CHAPTER 2: MEMORY SYSTEMS 37
INTRODUCTION 37 MEMORY SPACES 38 LI INSTRUCTION MEMORY 40 USING LI
INSTRUCTION MEMORY FOR DATA PLACEMENT 40 VI/7 CONTENTS LI DATA MEMORY 41
CACHE OVERVIEW 42 WHATLS CACHE? 42 DIRECT-MAPPED CACHE 45 FULLY
ASSOCIATIVE CACHE 45 N-WAY SET-ASSOCIATIVE CACHE 46 MORE CACHE DETAILS
46 WRITE-THROUGH AND WRITE-BACK DATA CACHE 49 MORE CACHE IN OUR FUTURE
51 EXTERNAL MEMORY 51 SYNCHRONOUS MEMORY 52 SDRAM 52 CASLATENCY 57
REFRESHING THE SDRAM 58 MOBILE SDRAM 59 DOUBLE DATA RATE (DDR)
SDRAM/DDR1 60 DDR2 SDRAM 61 ASYNCHRONOUS MEMORY 62 NONVOLATILE MEMORIES
65 NAND AND NOR FLASH MEMORIES 66 HARD DISK STORAGE*IDE, ATA AND ATAPI
70 OTHER HARD DRIVE INTERFACES 71 SERIAL ATA (SATA) 71 SCSI 72
MICRODRIVE 72 USB/FIREWIRE 72 EMERGING NONVOLATILE MEMORY TECHNOLOGIES
73 WHAT'SNEXT? 73 CHAPTER 3: DIRECT MEMORY ACCESS 75 INTRODUCTION 75 DMA
CONTROLLER OVERVIEW 76 MORE ON THE DMA CONTROLLER 78 PROGRAMMING THE DMA
CONTROLLER 80 DMA CLASSIFICATIONS 92 REGISTER-BASED DMA 92
DESCRIPTOR-BASED DMA 95 DESCRIPTOR MANAGEMENT 96 ADVANCED DMA FEATURES
99 IX CONTENTS SYSTEM PERFORMANCE TUNING 99 EXTERNAL DMA 100 WHAT'S
NEXT? 101 CHAPTER 4: SYSTEM RESOURCE PARTITIONING AND CODE OPTIMIZATION
703 INTRODUCTION 103 EVENT GENERATION AND HANDLING 104 SYSTEM INTERRUPTS
104 PROGRAMMING METHODOLOGY 107 ARCHITECTURAL FEATURES FOR EFFICIENT
PROGRAMMING 108 MULTIPLE OPERATIONS PER CYCLE 109 HARDWARE LOOP
CONSTRUCTS 110 SPECIALIZED ADDRESSING MODES 112 BYTE ADDRESSABILITY 112
CIRCULAR BUFFERING 112 BIT REVERSAL 115 INTERLOCKED INSTRUCTION
PIPELINES 116 COMPILER CONSIDERATIONS FOR EFFICIENT PROGRAMMING 119
CHOOSING DATATYPES 120 ARRAYS VERSUS POINTERS 120 DIVISION 121 LOOPS 121
DATA BUFFERS 123 INTRINSICS AND IN-LINING 123 VOLATILE DATA 125 SYSTEM
AND CORE SYNCHRONIZATION 125 LOAD/STORE SYNCHRONIZATION 126 ORDERING 126
ATOMIC OPERATIONS 129 MEMORY ARCHITECTURE*THE NEED FOR MANAGEMENT 129
MEMORY ACCESS TRADEOFFS 129 INSTRUCTION MEMORY MANAGEMENT*TO CACHE ORTO
DMA? 131 DATA MEMORY MANAGEMENT 132 WHAT ABOUT DATA CACHE? 133 SYSTEM
GUIDELINES FOR CHOOSING BETWEEN DMA AND CACHE 135 INSTRUCTION CACHE,
DATA DMA 135 INSTRUCTION CACHE, DATA DMA/CACHE 136 INSTRUCTION DMA, DATA
DMA 136 MEMORY MANAGEMENT UNIT (MMU) 140 X CONTENTS CPLB MANAGEMENT 140
MEMORY TRANSLATION 141 PHYSICS OF DATA MOVEMENT 141 GROUPING LIKE
TRANSFERS TO MINIMIZE MEMORY BUS TURNAROUNDS 142 UNDERSTANDING CORE AND
DMA SDRAM ACCESSES 144 KEEPING SDRAM ROWS OPEN AND PERFORMING MULTIPLE
PASSES ON DATA 145 OPTIMIZING THE SYSTEM CLOCK SETTINGS AND ENSURING
REFRESH RATES ARE TUNED FOR THE SPEED AT WHICH SDRAM RUNS 147 EXPLOITING
PRIORITY AND ARBITRATION SCHEMES BETWEEN SYSTEM RESOURCES 148
WHAT'SNEXT? 148 CHAPTER 5: BASICS OF EMBEDDED AUDIO PROCESSING 749
INTRODUCTION 149 WHAT IS SOUND? 149 AUDIO SIGNALS 151 SPEECH PROCESSING
152 AUDIO SOURCES AND SINKS 152 CONVERTING BETWEEN ANALOG AND DIGITAL
AUDIO SIGNALS 152 BACKGROUND ON AUDIO CONVERTERS 155 AUDIO ADCS 155
AUDIO DACS 156 CONNECTING TO AUDIO CONVERTERS 156 ANADCEXAMPLE 156 PS
(INTER-IC-SOUND) 158 SPI (SERIAL PERIPHERAL INTERFACE) 158 DACS AND
CODECS 159 AC '97 (AUDIO CODEC '97) 159 SPEECH CODECS 160 PWM OUTPUT 160
INTERCONNECTIONS 160 CONNECTORS 161 DIGITAL CONNECTIONS 161 DYNAMIC
RANGE AND PRECISION 162 NUMERIC FORMATS FOR AUDIO 166 FIXED-POINT
ARITHMETIC 168 FLOATING-POINT ARITHMETIC 168 EMULATION ON 16-BIT
ARCHITECTURES 170 FLOATING-POINT EMULATION ON FIXED-POINT PROCESSORS 171
DOUBLE-PRECISION FIXED-POINT EMULATION 171 XI CONTENTS 32-BIT-ACCURATE
EMULATION 171 31-BIT-ACCURATE EMULATION 173 AUDIO PROCESSING METHODS 174
GETTING DATA TO THE PROCESSOR'S CORE 174 BLOCK PROCESSING VERSUS SAMPLE
PROCESSING 174 DOUBLE-BUFFERING 174 2DDMA 176 BASIC OPERATIONS 176
SIGNAL GENERATION 178 FILTERING AND ALGORITHMS 178 FINITE IMPULSE
RESPONSE (FIR) FILTER 178 INFINITE IMPULSE RESPONSE (HR) FILTER 179 FAST
FOURIER TRANSFORM 179 SAMPLE RATE CONVERSION 180 AUDIO COMPRESSION 181
MP3 ]L83 AAC 183 AC-3 183 WMA 183 REAL AUDIO 184 VORBIS 184 FLAC 184
SPEECH COMPRESSION 184 GSM ''I"'IL85 THE "G-DOT" STANDARDS 186 G.711 186
G.723.1 186 G.729 187 SPEEX 187 WHAT'S NEXT? 187 CHAPTER 6: BASICS OF
EMBEDDED VIDEO AND IMAGE PROCESSING 189 INTRODUCTION 189 HUMAN VISUAL
PERCEPTION 189 WHAT'S A VIDEO SIGNAL? 191 BROADCAST TV*NTSC AND PAL 193
VIDEO RESOLUTION 193 INTERLACED VERSUS PROGRESSIVE SCANNING 194 COLOR
SPACES 195 XII CONTENTS GAMMA CORRECTION 196 CHROMA SUBSAMPLING 198
DIGITAL VIDEO 201 ITU-RBT.601 (FORMERLYCCIR-601) 202 ITU-R BT.656
(FORMERLY CCIR-656) 202 A SYSTEMS VIEW OF VIDEO 206 VIDEO SOURCES 207
ANALOG VIDEO SOURCES 207 DIGITAL VIDEO SOURCES 208 CCDS AND CMOS SENSORS
208 BAYER PATTERN 208 CONNECTING TO IMAGE SENSORS 211 IMAGE PIPE 211
VIDEO DISPLAYS 214 ANALOG VIDEO DISPLAYS 214 VIDEO ENCODER 214 CATHODE
RAY TUBES (CRTS) 216 DIGITAL VIDEO DISPLAYS 217 LIQUID CRYSTAL DISPLAY
(LCD) PANELS 217 OLED (ORGANIC LIGHT-EMITTING DIODE) DISPLAYS 219
EMBEDDED VIDEO PROCESSING CONSIDERATIONS 219 VIDEO PORT FEATURES 219
PACKING 221 POSSIBLE DATA FLOWS 222 VIDEO ALUS 223 DMA CONSIDERATIONS
227 PLANAR VERSUS INTERLEAVED BUFFER FORMATS 228 DOUBLE-BUFFERING 228
CLASSIFICATION OF VIDEO ALGORITHMS 229 BANDWIDTH CALCULATIONS 230 SAMPLE
VIDEO APPLICATION WALK-THROUGH 231 DEINTERLACING 232 SCAN RATE
CONVERSION 233 PIXEL PROCESSING 234 2D CONVOLUTION 235 DEALING WITH
IMAGE BOUNDARIES 236 CHROMA RESAMPLING, GAMMA CORRECTION AND COLOR
CONVERSION 237 SCALING AND CROPPING 238 INCREASING OR DECREASING PIXELS
PER ROW 238 XIII CONTENTS INCREASING OR REDUCING LINES PER FRAME 239
DISPLAY PROCESSING 239 ALPHA BLENDING 239 COMPOSITING 240 CHROMA KEYING
240 ROTATION 240 OUTPUT FORMATTING 241 COMPRESSION/DECOMPRESSION 241
LOSSLESS VERSUS LOSSY COMPRESSION 242 IMAGE COMPRESSION 243 BMP 243 GIF
244 PNG 244 JPEG 244 JPEG2000 244 VIDEO COMPRESSION 245 MOTION JPEG
(M-JPEG) 246 H.261 247 MPEG-1 247 MPEG-2 247 H.263 248 MPEG-4 248 DV 248
QUICKTIME 249 REALVIDEO 249 WINDOWS MEDIA VIDEO (WMV)/VC-1 249 THEORA
249 H.264 249 ENCODING/DECODING ON AN EMP 250 TRANSCODING 251
WHAT'SNEXT? 252 CHAPTER 7: MEDIA PROCESSING FRAMEWORKS 253 INTRODUCTION
253 WHAT IS A FRAMEWORK? 254 DEFINING YOUR FRAMEWORK 255 THE APPLICATION
TIMELINE 256 EVALUATING BANDWIDTH 257 PROCESSOR BANDWIDTH 260 XIV
CONTENTS DMA BANDWIDTH 261 MEMORY BANDWIDTH 261 ASYMMETRIE AND SYMMETRIE
DUAL-CORE PROEESSORS 264 PROGRAMMING MODELS 265 ASYMMETRIE PROGRAMMING
MODEL 265 HOMOGENEOUS PROGRAMMING MODEL 267 MASTER-SLAVE PROGRAMMING
MODEL 268 PIPELINED PROGRAMMING MODEL 269 STRATEGIES FOR ARCHITECTING A
FRAMEWORK 270 PROCESSING DATA ON-THE-FLY 270 PROGRAMMING EASE TRUMPS
PERFORMANCE 273 PERFORMANCE-BASED FRAMEWORK 276 IMAGE PIPE AND
COMPRESSION EXAMPLE 277 HIGH PERFORMANCE DECODER EXAMPLE 278 FRAMEWORK
TIPS 282 OTHER TOPICS IN MEDIA FRAMEWORKS 283 AUDIO-VIDEO
SYNCHRONIZATION 283 MANAGING SYSTEM FLOW 285 FRAMEWORKS AND ALGORITHM
COMPLEXITY 289 WHAT'SNEXT? 289 CHAPTER 8: POWER MANAGEMENT FOR EMBEDDED
SYSTEMS 297 INTRODUCTION 291 A PROCESSOR'S VIEW OF POWER 292 INPUTCLOCK
293 PHASE-LOCKED LOOP (PLL) 293 FREQUENCY, VOLTAGE AND POWER 294
PROCESSOR POWER MODES 297 FULL-ONMODE 298 ACTIVE MODE 298 SLEEPMODE 298
DEEP-SLEEP MODE 299 HIBERNATE MODE 299 TAKING ADVANTAGE OF POWER MODES
299 POWER DOMAINS 301 OTHER CONSIDERATIONS 302 POWER-FRIENDLY
ARCHITECTURES 302 SYMMETRIE MULTIPROCESSING 302 SOFTWARE TOOLS 303 XV
CONTENTS VOLTAGE REGULATION 303 LINEAR REGULATORS 304 SWITCHING
REGULATORS 305 STEP-DOWN SWITCHING REGULATOR 306 EFFICIENCY 3 JG
COMPONENT SELECTION FOR STEP-DOWN REGULATORS 311 SCHOTTKY DIODE AND FET
SWITCH " 31 J INDUCTOR CONSIDERATIONS 3)2 INDUCTANCE VALUE 3]2
SATURATION CURRENT 313 DC RESISTANCE 3 J4 SELF-RESONANT FREQUENCY 3]4
CAPACITOR CONSIDERATIONS 314 TECHNOLOGY/CONSTRUCTION 314 CAPACITANCE
VALUE 3^4 RIPPLE CURRENT ^16 INPUT AND OUTPUT FILTERING 315 SWITCHING
FREQUENCY 3J7 CALCULATING SYSTEM POWER 3JG AVERAGE POWER DISSIPATION 31G
AVERAGE INTERNAL POWER CONSUMPTION 3 J 9 AVERAGE EXTERNAL POWER
DISSIPATION 320 BATTERY FUNDAMENTALS 32] PRIMARY BATTERIES 322 ALKALINE
32? LITHIUM 323 SILVER OXIDE 323 ZINC AIR 323 RECHARGEABLE BATTERIES 323
NICKEL CADMIUM (NICD) 323 NICKEL METAL HYDRIDE (NIMH) 323 LITHIUM ION
(LI+ OR LI-ION) 324 LITHIUM POLYMER 324 RELATIVE POWER FOR EXTERNAL
DEVICES 326 CHAPTER 9: APPLICATION EXAMPLES 327 INTRODUCTION 327
AUTOMOTIVE DRIVER ASSISTANCE 328 AUTOMOTIVE SAFETY SYSTEMS 328 XVI
CONTENTS SMART AIRBAGS 328 COLLISION AVOIDANCE AND ADAPTIVE CRUISE
CONTROL 329 LANE DEPARTURE*A SYSTEM EXAMPLE 331 IMAGE ACQUISITUM 333
MEMORY AND DATA MOVEMENT 333 PROJECTION CORRECTION 336 IMAGE FILTERING
336 EDGE DETECTION 338 STRAIGHT LINE DETECTION*HOUGH TRANSFORM 339 LANE
TRACKING 342 DECISION MAKING 343 BASELINE JPEG COMPRESSION OVERVIEW 344
PREPROCESSING 344 COLOR SPACE 344 SPATIAL FILTERING 345 DISCRETE COSINE
TRANSFORM (DCT) 346 QUANTIZATION 347 ZIGZAG SORTING 348 CODING THE DC
COEFFICIENTS 349 CODING THE AC COEFFICIENTS (RUN-LENGTH CODING) 350
ENTROPY ENCODING 350 HUFFMAN CODING 351 JPEG FILE INTERCHANGE FORMAT
(JFIF) 352 MPEG-2 ENCODING 353 MOTION ESTIMATION/COMPENSATION 354 FRAME
TYPES 356 FORMAT CONVERSION 357 MPEG-2 ENCODER FRAMEWORKS 359 CODE
OPTIMIZATION STUDY USING OPEN-SOURCE ALGORITHMS 363 WHAT IS OPEN SOURCE?
363 WHATLSOGG? 363 WHAT IS VORBIS? 364 WHATLSSPEEX? 366 OPTIMIZING
VORBIS AND SPEEX ON BLACKFIN 366 COMPILER OPTIMIZATION 368 SYSTEM
OPTIMIZATION 370 INSTRUCTION EXECUTION 370 DATA MANAGEMENT 371 ASSEMBLY
OPTIMIZATION 372 XVII CONTENTS APPENDIX: SOURCES AND FURTHER READING 373
CHAPTER 1 373 CHAPTER 2 373 CHAPTER 3 374 CHAPTER 4 3-74 CHAPTER 5 3-74
CHAPTER 6 375 CHAPTER 7 377 CHAPTER 8 377 CHAPTER 9 37G INDEX 379 XVIII |
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| author | Katz, David J. Gentile, Rick |
| author_facet | Katz, David J. Gentile, Rick |
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| author_sort | Katz, David J. |
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| building | Verbundindex |
| bvnumber | BV035063464 |
| callnumber-first | T - Technology |
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| callnumber-raw | TK5102.9 |
| callnumber-search | TK5102.9 |
| callnumber-sort | TK 45102.9 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 6040 |
| ctrlnum | (OCoLC)60421201 (DE-599)BVBBV035063464 |
| dewey-full | 004.16 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 004 - Computer science |
| dewey-raw | 004.16 |
| dewey-search | 004.16 |
| dewey-sort | 14.16 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV035063464 |
| illustrated | Illustrated |
| index_date | 2024-07-02T22:01:26Z |
| indexdate | 2024-07-09T21:21:22Z |
| institution | BVB |
| isbn | 0750679123 9780750679121 |
| language | English |
| lccn | 2005013672 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016731955 |
| oclc_num | 60421201 |
| open_access_boolean | |
| owner | DE-92 |
| owner_facet | DE-92 |
| physical | XXXI, 389 S. Ill. 1 CD-ROM (12 cm) |
| publishDate | 2006 |
| publishDateSearch | 2006 |
| publishDateSort | 2006 |
| publisher | Elsevier [u.a.] |
| record_format | marc |
| series2 | Embedded technology series |
| spelling | Katz, David J. Verfasser aut Embedded media processing by David J. Katz and Rick Gentile Amsterdam [u.a.] Elsevier [u.a.] 2006 XXXI, 389 S. Ill. 1 CD-ROM (12 cm) txt rdacontent n rdamedia nc rdacarrier Embedded technology series Computergeheugen gtt Embedded systems gtt Multimedia gtt Signaalverwerking gtt Signal processing Digital techniques Embedded computer systems Digitale Signalverarbeitung (DE-588)4113314-6 gnd rswk-swf Eingebettetes System (DE-588)4396978-1 gnd rswk-swf Multimedia (DE-588)4192358-3 gnd rswk-swf Multimedia (DE-588)4192358-3 s Eingebettetes System (DE-588)4396978-1 s DE-604 Digitale Signalverarbeitung (DE-588)4113314-6 s Gentile, Rick Verfasser aut http://www.loc.gov/catdir/toc/ecip0513/2005013672.html Table of contents only http://www.loc.gov/catdir/enhancements/fy0622/2005013672-d.html Publisher description GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016731955&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Katz, David J. Gentile, Rick Embedded media processing Computergeheugen gtt Embedded systems gtt Multimedia gtt Signaalverwerking gtt Signal processing Digital techniques Embedded computer systems Digitale Signalverarbeitung (DE-588)4113314-6 gnd Eingebettetes System (DE-588)4396978-1 gnd Multimedia (DE-588)4192358-3 gnd |
| subject_GND | (DE-588)4113314-6 (DE-588)4396978-1 (DE-588)4192358-3 |
| title | Embedded media processing |
| title_auth | Embedded media processing |
| title_exact_search | Embedded media processing |
| title_exact_search_txtP | Embedded media processing |
| title_full | Embedded media processing by David J. Katz and Rick Gentile |
| title_fullStr | Embedded media processing by David J. Katz and Rick Gentile |
| title_full_unstemmed | Embedded media processing by David J. Katz and Rick Gentile |
| title_short | Embedded media processing |
| title_sort | embedded media processing |
| topic | Computergeheugen gtt Embedded systems gtt Multimedia gtt Signaalverwerking gtt Signal processing Digital techniques Embedded computer systems Digitale Signalverarbeitung (DE-588)4113314-6 gnd Eingebettetes System (DE-588)4396978-1 gnd Multimedia (DE-588)4192358-3 gnd |
| topic_facet | Computergeheugen Embedded systems Multimedia Signaalverwerking Signal processing Digital techniques Embedded computer systems Digitale Signalverarbeitung Eingebettetes System |
| url | http://www.loc.gov/catdir/toc/ecip0513/2005013672.html http://www.loc.gov/catdir/enhancements/fy0622/2005013672-d.html http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=016731955&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| work_keys_str_mv | AT katzdavidj embeddedmediaprocessing AT gentilerick embeddedmediaprocessing |