High performance ASIC design: using synthesizable domino logic in an ASIC flow
Gespeichert in:
1. Verfasser: | |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Cambridge [u.a.]
Cambridge University Press
2008
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Ausgabe: | 1. publ. |
Schlagworte: | |
Online-Zugang: | Inhaltsverzeichnis |
Beschreibung: | Includes bibliographical references and index |
Beschreibung: | X, 145 S. Ill., graph. Darst. 26 cm |
ISBN: | 9780521873345 |
Internformat
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245 | 1 | 0 | |a High performance ASIC design |b using synthesizable domino logic in an ASIC flow |c Razak Hossain |
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500 | |a Includes bibliographical references and index | ||
650 | 4 | |a Application-specific integrated circuits |x Design and construction |x Computer-aided design | |
650 | 4 | |a Logic circuits |x Computer-aided design | |
650 | 4 | |a Very high speed integrated circuits |x Computer-aided design | |
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Datensatz im Suchindex
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adam_text | HIGH PERFORMANCE ASIC DESIGN USING SYNTHESIZABLE DOMINO LOGIC IN AN ASIC
FLOW RAZAK HOSSAIN STMICROELECTRONICS M. CAMBRIDGE UNIVERSITY PRESS
CONTENTS PREFACE PAGE VII ABBREVIATIONS IX AN INTRODUCTION TO DOMINO
LOGIC 1 1.1 CMOS AND NMOS 1 1.2 DOMINO LOGIC CIRCUITS 5 1.3 CLOCKING
DOMINO LOGIC 12 1.4 SUMMARY 15 HIGH-SPEED DIGITAL DESIGN 18 2.1
MICROPROCESSORS SINCE 1989 18 2.2 MICROARCHITECTURES FOR HIGH SPEED 22
2.3 DESIGNING AND USING HIGH-SPEED MEMORIES 31 2.4 WHAT TO REMEMBER IF
APPLYING DOMINO LOGIC 35 DOMINO LOGIC LIBRARY DESIGN 37 3.1 HIGH-SPEED
DIGITAL CIRCUIT DESIGN 37 3.2 AN INTRODUCTION TO STANDARD CELLS 42 3.3
DESIGNING A HIGH-PERFORMANCE STANDARD CELL LIBRARY 45 3.4 CIRCUIT DESIGN
OF DOMINO LOGIC CELLS: A QUALITATIVE APPROACH 48 3.5 CIRCUIT DESIGN OF
DOMINO LOGIC CELLS: A QUANTITATIVE APPROACH 51 3.6 CHARACTERIZING DOMINO
LOGIC-COMPATIBLE REGISTERS 63 3.7 LAYOUT OF DOMINO LOGIC STANDARD CELLS
65 3.8 TIMING MODELS FOR DOMINO LOGIC CELLS 66 DOMINO LOGIC SYNTHESIS 70
4.1 INTRODUCTION TO DOMINO LOGIC SYNTHESIS 70 4.2 UNATE TRANSFORM 73 4.3
PHASE ASSIGNMENT 75 4.4 PHASE-ASSIGNMENT RULES 77 4.5 AN EXAMPLE DOMINO
SYNTHESIS FLOW 86 4.6 SCHEMATIC CAPTURE OF DOMINO DESIGNS 106 VI
CONTENTS CIRCUITS DESIGNED WITH DOMINO LOGIC IN AN ASIC FLOW 108 5.1
INTRODUCTION 108 5.2 DOMINO INTEGER EXECUTION UNIT 108 5.3 A SYNTHESIZED
DOMINO LOGIC DSP CORE 119 5.4 A SYNTHESIZABLE DOMINO LOGIC VITERBI
ADD-COMPARE-SELECT (ACS) TEST CHIP 121 5.5 INTEL S PUBLISHED DOMINO
LOGIC SYNTHESIS FLOW 124 5.6 CONCLUSIONS 126 EVOLUTION OF DOMINO LOGIC
SYNTHESIS 127 6.1 THE STATE OF DIGITAL ASIC DESIGN METHODOLOGIES 127 6.2
PROCESS TRENDS AND DOMINO LOGIC 128 6.3 CLOCKING METHODOLOGY FOR DOMINO
CIRCUITS 130 6.4 SYNTHESIZING OTHER DYNAMIC LOGIC FAMILIES 132 6.5 FLOW
IMPROVEMENTS FOR DOMINO SYNTHESIS 137 6.6 THE CASE FOR DOMINO LOGIC
SYNTHESIS 141 INDEX 143
|
any_adam_object | 1 |
author | Hossain, Razak |
author_facet | Hossain, Razak |
author_role | aut |
author_sort | Hossain, Razak |
author_variant | r h rh |
building | Verbundindex |
bvnumber | BV024629332 |
callnumber-first | T - Technology |
callnumber-label | TK7874 |
callnumber-raw | TK7874.6 |
callnumber-search | TK7874.6 |
callnumber-sort | TK 47874.6 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ZN 4904 |
ctrlnum | (OCoLC)214323038 (DE-599)BVBBV024629332 |
dewey-full | 621.39/5 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/5 |
dewey-search | 621.39/5 |
dewey-sort | 3621.39 15 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | 1. publ. |
format | Book |
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id | DE-604.BV024629332 |
illustrated | Illustrated |
indexdate | 2024-07-09T22:03:23Z |
institution | BVB |
isbn | 9780521873345 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-018600948 |
oclc_num | 214323038 |
open_access_boolean | |
owner | DE-83 DE-29T |
owner_facet | DE-83 DE-29T |
physical | X, 145 S. Ill., graph. Darst. 26 cm |
publishDate | 2008 |
publishDateSearch | 2008 |
publishDateSort | 2008 |
publisher | Cambridge University Press |
record_format | marc |
spelling | Hossain, Razak Verfasser aut High performance ASIC design using synthesizable domino logic in an ASIC flow Razak Hossain 1. publ. Cambridge [u.a.] Cambridge University Press 2008 X, 145 S. Ill., graph. Darst. 26 cm txt rdacontent n rdamedia nc rdacarrier Includes bibliographical references and index Application-specific integrated circuits Design and construction Computer-aided design Logic circuits Computer-aided design Very high speed integrated circuits Computer-aided design Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 Logische Schaltung (DE-588)4131023-8 s GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018600948&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
spellingShingle | Hossain, Razak High performance ASIC design using synthesizable domino logic in an ASIC flow Application-specific integrated circuits Design and construction Computer-aided design Logic circuits Computer-aided design Very high speed integrated circuits Computer-aided design Schaltungsentwurf (DE-588)4179389-4 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd Logische Schaltung (DE-588)4131023-8 gnd |
subject_GND | (DE-588)4179389-4 (DE-588)4122250-7 (DE-588)4131023-8 |
title | High performance ASIC design using synthesizable domino logic in an ASIC flow |
title_auth | High performance ASIC design using synthesizable domino logic in an ASIC flow |
title_exact_search | High performance ASIC design using synthesizable domino logic in an ASIC flow |
title_full | High performance ASIC design using synthesizable domino logic in an ASIC flow Razak Hossain |
title_fullStr | High performance ASIC design using synthesizable domino logic in an ASIC flow Razak Hossain |
title_full_unstemmed | High performance ASIC design using synthesizable domino logic in an ASIC flow Razak Hossain |
title_short | High performance ASIC design |
title_sort | high performance asic design using synthesizable domino logic in an asic flow |
title_sub | using synthesizable domino logic in an ASIC flow |
topic | Application-specific integrated circuits Design and construction Computer-aided design Logic circuits Computer-aided design Very high speed integrated circuits Computer-aided design Schaltungsentwurf (DE-588)4179389-4 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd Logische Schaltung (DE-588)4131023-8 gnd |
topic_facet | Application-specific integrated circuits Design and construction Computer-aided design Logic circuits Computer-aided design Very high speed integrated circuits Computer-aided design Schaltungsentwurf Kundenspezifische Schaltung Logische Schaltung |
url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018600948&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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