Verfügbarkeit: Distributed embedded control systems

Distributed embedded control systems: Improving dependability with coherent design

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Bibliographische Detailangaben
Hauptverfasser:	Colnarič, Matjaž (VerfasserIn), Verber, Domen (VerfasserIn), Halang, Wolfgang A. 1951- (VerfasserIn)
Format:	Buch
Sprache:	English
Veröffentlicht:	London Springer 2008
Schriftenreihe:	Advances in industrial control
Online-Zugang:	Inhaltsverzeichnis
Beschreibung:	XVIII, 270 S. graph. Darst. 235 mm x 155 mm
ISBN:	9781848000513

Internformat

MARC


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Datensatz im Suchindex

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adam_text	MATJAZ COLNARIC * DOMEN VERBER WOLFGANG A. HALANG DISTRIBUTED EMBEDDED CONTROL SYSTEMS IMPROVING DEPENDABILITY WITH COHERENT DESIGN SPRINGER CONTENTS PART I CONCEPTS 1 REAL-TIME CHARACTERISTICS AND SAFETY OF EMBEDDED SYSTEMS 3 1.1 INTRODUCTION 3 1.2 REAL-TIME SYSTEMS AND THEIR PROPERTIES 5 1.2.1 DEFINITIONS, CLASSIFICATION AND PROPERTIES 6 1.2.2 PROBLEMS IN ADEQUATE IMPLEMENTATION OF EMBEDDED APPLICATIONS AND GENERAL GUIDELINES 10 1.3 SAFETY OF EMBEDDED COMPUTER CONTROL SYSTEMS 13 1.3.1 BRIEF HISTORY OF SAFETY STANDARDS RELATING TO COMPUTERS IN CONTROL 16 1.3.2 SAFETY INTEGRITY LEVELS 19 1.3.3 DEALING WITH FAULTS IN EMBEDDED CONTROL SYSTEMS .... 21 1.3.4 FAULT-TOLERANCE MEASURES 23 1.4 SUMMARY OF CHAPTER 1 AND SYNOPSIS OF WHAT FOLLOWS 28 2 MULTITASKING 29 2.1 TASK MANAGEMENT SYSTEMS 29 2.1.1 CYCLIC EXECUTIVE 30 2.1.2 ASYNCHRONOUS MULTITASKING 32 2.2 SCHEDULING AND SCHEDULABILITY 34 2.2.1 SCHEDULING METHODS AND TECHNIQUES 35 2.2.2 DEADLINE-DRIVEN SCHEDULING 39 2.2.3 SUFFICIENT CONDITION FOR FEASIBLE SCHEDULABILITY UNDER EARLIEST DEADLINE FIRST 41 XIV CONTENTS 2.2.4 IMPLICATIONS OF EMPLOYING EARLIEST DEADLINE FIRST SCHEDULING 45 2.2.5 RATE MONOTONIE VS EARLIEST DEADLINE FIRST SCHEDULING . . 46 2.3 SYNCHRONISATION BETWEEN TASKS 50 2.3.1 BUSY WAITING 51 2.3.2 SEMAPHORES 53 2.3.3 BOLTS 54 2.3.4 MONITORS 55 2.3.5 RENDEZVOUS 56 2.3.6 BOUNDING WAITING TIMES IN SYNCHRONISATION 57 3 HARDWARE AND SYSTEM ARCHITECTURES 61 3.1 UNDESIRABLE PROPERTIES OF CONVENTIONAL HARDWARE ARCHITECTURES AND IMPLEMENTATIONS 62 3.1.1 PROCESSOR ARCHITECTURES 63 3.1.2 SYSTEM ARCHITECTURES 67 3.2 TOP-LAYER ARCHITECTURE: AN ASYMMETRICAL MULTIPROCESSOR SYSTEM 69 3.2.1 CONCEPT 70 3.2.2 OPERATING SYSTEM KERNEL PROCESSOR 73 3.2.3 TASK PROCESSOR 78 3.3 IMPLEMENTATION OF ARCHITECTURAL MODELS 82 3.3.1 CENTRALISED ASYMMETRICAL MULTIPROCESSOR MODEL 83 3.3.2 DISTRIBUTED MULTIPROCESSOR MODEL 86 3.4 INTELLIGENT PERIPHERAL INTERFACES FOR INCREASED DEPENDABILITY AND FUNCTIONALITY 86 3.4.1 HIGHER-LEVEL FUNCTIONS OF THE INTELLIGENT PERIPHERAL INTERFACES 88 3.4.2 ENHANCING FAULT TOLERANCE 89 3.4.3 SUPPORT FOR PROGRAMMED TEMPORAL FUNCTIONS 90 3.4.4 PROGRAMMING PERIPHERAL INTERFACES 93 3.5 ADEQUATE DATA TRANSFER 93 3.5.1 REAL-TIME COMMUNICATION 94 3.5.2 TIME-TRIGGERED COMMUNICATION 95 3.5.3 FAULT TOLERANCE IN COMMUNICATION 98 3.5.4 DISTRIBUTED DATA ACCESS: DISTRIBUTED REPLICATED SHARED MEMORY 100 CONTENTS XV 4 PROGRAMMING OF EMBEDDED SYSTEMS 107 4.1 PROPERTIES DESIRED OF CONTROL SYSTEMS DEVELOPMENT ILL 4.1.1 SUPPORT FOR TIME AND TIMING OPERATIONS ILL 4.1.2 EXPLICIT REPRESENTATION OF CONTROL SYSTEM ENTITIES .... 116 4.1.3 EXPLICIT REPRESENTATION OF OTHER CONTROL SYSTEM ENTITIES 119 4.1.4 SUPPORT FOR TEMPORAL PREDICTABILITY 120 4.1.5 SUPPORT FOR LOW-LEVEL INTERACTION WITH SPECIAL-PURPOSE HARDWARE DEVICES 121 4.1.6 SUPPORT FOR OVERLOAD PREVENTION 124 4.1.7 SUPPORT FOR HANDLING FAULTS AND EXCEPTIONS 124 4.1.8 SUPPORT FOR HARDWARE/SOFTWARE CO-IMPLEMENTATION . . . 130 4.1.9 OTHER CAPABILITIES 132 4.2 TIME MODELING AND ANALYSIS 132 4.2.1 EXECUTION TIME ANALYSIS OF SPECIFICATIONS 135 4.2.2 EXECUTION TIME ANALYSIS OF SOURCE CODE 136 4.2.3 EXECUTION TIME ANALYSIS OF EXECUTABLE CODE 140 4.2.4 EXECUTION TIME ANALYSIS OF HARDWARE COMPONENTS .... 141 4.2.5 DIRECT MEASUREMENT OF EXECUTION TIMES 142 4.2.6 PROGRAMMING LANGUAGE SUPPORT FOR TEMPORAL PREDICTABILITY 144 4.2.7 SCHEDULABILITY ANALYSIS 147 4.3 OBJECT-ORIENTATION AND EMBEDDED SYSTEMS 149 4.3.1 DIFFICULTIES OF INTRODUCING OBJECT-ORIENTATION TO EMBEDDED REAL-TIME SYSTEMS 150 4.3.2 INTEGRATION OF OBJECTS INTO DISTRIBUTED EMBEDDED SYSTEMS 150 4.4 SURVEY OF PROGRAMMING LANGUAGES FOR EMBEDDED SYSTEMS .... 156 4.4.1 ASSEMBLY LANGUAGE 157 4.4.2 GENERAL-PURPOSE PROGRAMMING LANGUAGES 158 4.4.3 SPECIAL-PURPOSE REAL-TIME PROGRAMMING LANGUAGES .... 160 4.4.4 LANGUAGES FOR PROGRAMMABLE LOGIC CONTROLLERS 163 PART II IMPLEMENTATION 5 HARDWARE PLATFORM 169 5.1 ARCHITECTURE 169 CONTENTS 5.2 COMMUNICATION MODULE USED IN PROCESSING AND PERIPHERAL UNITS 171 5.3 FAULT TOLERANCE OF THE HARDWARE PLATFORM 175 5.4 SYSTEM SOFTWARE OF THE EXPERIMENTAL PLATFORM 176 IMPLEMENTATION OF A FAULT-TOLERANT DISTRIBUTED EMBEDDED SYSTEM 181 6.1 GENERALISED MODEL OF FAULT-TOLERANT REAL-TIME CONTROL SYSTEMS 182 6.2 IMPLEMENTATION OF LOGICAL STRUCTURES ON THE HARDWARE PLATFORM 185 6.3 PARTIAL IMPLEMENTATION IN FIRMWARE 187 6.3.1 COMMUNICATION SUPPORT MODULE 188 6.3.2 SUPPORTING MIDDLEWARE FOR DISTRIBUTED SHARED MEMORY 189 6.3.3 KERNEL PROCESSOR 190 6.3.4 IMPLEMENTATION OF MONITORING, RECONFIGURATION AND MODE CONTROL UNIT 195 6.4 PROGRAMMING OF THE FTCS 196 6.4.1 EXTENSIONS TO MATLAB/SIMULINKFUNCTION BLOCK LIBRARY 196 6.4.2 GENERATION OF TIME SCHEDULES FOR THE TTCAN COMMUNICATION PROTOCOL 197 6.4.3 DEVELOPMENT PROCESS 199 ASYNCHRONOUS REAL-TIME EXECUTION WITH RUNTIME STATE RESTORATION BY MARTIN SKAMBRAKS 201 7.1 DESIGN OBJECTIVES 201 7.2 TASK-ORIENTED REAL-TIME EXECUTION WITHOUT ASYNCHRONOUS INTERRUPTS 202 7.2.1 OPERATING PRINCIPLE 203 7.2.2 PRIORITY INHERITANCE PROTOCOL 206 7.2.3 ASPECTS OF SAFETY LICENSING 211 7.2.4 FRAGMENTATION OF PROGRAM CODE 213 7.3 STATE RESTORATION AT RUNTIME 220 7.3.1 STATE RESTORATION AT RUNTIME AND ASSOCIATED PROBLEMS 222 7.3.2 CLASSIFICATION OF STATE CHANGES 226 7.3.3 STATE RESTORATION WITH MODIFICATION BITS 227 7.3.4 CONCEPT OF STATE RESTORATION 229 7.3.5 INFLUENCE ON PROGRAM CODE FRAGMENTATION AND PERFORMANCE ASPECTS 233 CONTENTS XVII 8 EPILOGUE 237 REFERENCES 241 INDEX 247
any_adam_object	1
author	Colnarič, Matjaž Verber, Domen Halang, Wolfgang A. 1951-
author_GND	(DE-588)120993732
author_facet	Colnarič, Matjaž Verber, Domen Halang, Wolfgang A. 1951-
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ctrlnum	(OCoLC)255689178 (DE-599)DNB985199954
discipline	Maschinenbau / Maschinenwesen Informatik Mess-/Steuerungs-/Regelungs-/Automatisierungstechnik / Mechatronik
format	Book
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indexdate	2024-07-09T22:03:15Z
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physical	XVIII, 270 S. graph. Darst. 235 mm x 155 mm
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spelling	Colnarič, Matjaž Verfasser aut Distributed embedded control systems Improving dependability with coherent design Matjaž Colnaric ; Domen Verber ; Wolfgang A. Halang London Springer 2008 XVIII, 270 S. graph. Darst. 235 mm x 155 mm txt rdacontent n rdamedia nc rdacarrier Advances in industrial control Verber, Domen Verfasser aut Halang, Wolfgang A. 1951- Verfasser (DE-588)120993732 aut Erscheint auch als Online-Ausgabe 978-1-84800-052-0 GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018595283&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis
spellingShingle	Colnarič, Matjaž Verber, Domen Halang, Wolfgang A. 1951- Distributed embedded control systems Improving dependability with coherent design
title	Distributed embedded control systems Improving dependability with coherent design
title_auth	Distributed embedded control systems Improving dependability with coherent design
title_exact_search	Distributed embedded control systems Improving dependability with coherent design
title_full	Distributed embedded control systems Improving dependability with coherent design Matjaž Colnaric ; Domen Verber ; Wolfgang A. Halang
title_fullStr	Distributed embedded control systems Improving dependability with coherent design Matjaž Colnaric ; Domen Verber ; Wolfgang A. Halang
title_full_unstemmed	Distributed embedded control systems Improving dependability with coherent design Matjaž Colnaric ; Domen Verber ; Wolfgang A. Halang
title_short	Distributed embedded control systems
title_sort	distributed embedded control systems improving dependability with coherent design
title_sub	Improving dependability with coherent design
url	http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018595283&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA
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