APA (7th ed.) Citation

(2008). System-on-chip test architectures: Nanometer design for testability. Elsevier/Morgan Kaufmann Publ.

Chicago Style (17th ed.) Citation

System-on-chip Test Architectures: Nanometer Design for Testability. Amsterdam [u.a.]: Elsevier/Morgan Kaufmann Publ, 2008.

MLA (9th ed.) Citation

System-on-chip Test Architectures: Nanometer Design for Testability. Elsevier/Morgan Kaufmann Publ, 2008.