Introduction to logic design:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boca Raton
CRC Press
2008
|
| Ausgabe: | [1st ed.] |
| Schlagworte: | |
| Beschreibung: | XXII, 692 S. Ill., graph. Darst. |
| ISBN: | 9781420060942 1420060945 |
Internformat
MARC
| LEADER | 00000nam a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV023046198 | ||
| 003 | DE-604 | ||
| 005 | 20100326 | ||
| 007 | t | ||
| 008 | 071212s2008 xxuad|| |||| 00||| eng d | ||
| 010 | |a 2007044293 | ||
| 020 | |a 9781420060942 |9 978-1-4200-6094-2 | ||
| 020 | |a 1420060945 |9 1-4200-6094-5 | ||
| 035 | |a (OCoLC)144226528 | ||
| 035 | |a (DE-599)GBV54754507X | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 044 | |a xxu |c US | ||
| 049 | |a DE-703 |a DE-634 |a DE-859 | ||
| 050 | 0 | |a TK7872.L64 | |
| 082 | 0 | |a 621.395 |b Y3I5 |2 22 | |
| 082 | 0 | |a 621.39/5 | |
| 084 | |a ST 195 |0 (DE-625)143608: |2 rvk | ||
| 084 | |a ZN 5600 |0 (DE-625)157468: |2 rvk | ||
| 100 | 1 | |a Januškevič, Svetlana N. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Introduction to logic design |c Svetlana N. Yanushkevich ; Vlad P. Shmerko |
| 250 | |a [1st ed.] | ||
| 264 | 1 | |a Boca Raton |b CRC Press |c 2008 | |
| 300 | |a XXII, 692 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 7 | |a Diseño lógico |2 lemb | |
| 650 | 4 | |a Dispositivos lógicos | |
| 650 | 4 | |a Logic devices |x Design and construction | |
| 650 | 4 | |a Logic design | |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)4151278-9 |a Einführung |2 gnd-content | |
| 689 | 0 | 0 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Šmerko, Vlad P. |e Sonstige |4 oth | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-016249650 | ||
Datensatz im Suchindex
| _version_ | 1804137277033545728 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Januškevič, Svetlana N. |
| author_facet | Januškevič, Svetlana N. |
| author_role | aut |
| author_sort | Januškevič, Svetlana N. |
| author_variant | s n j sn snj |
| building | Verbundindex |
| bvnumber | BV023046198 |
| callnumber-first | T - Technology |
| callnumber-label | TK7872 |
| callnumber-raw | TK7872.L64 |
| callnumber-search | TK7872.L64 |
| callnumber-sort | TK 47872 L64 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 195 ZN 5600 |
| ctrlnum | (OCoLC)144226528 (DE-599)GBV54754507X |
| dewey-full | 621.395 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 621.39/5 |
| dewey-search | 621.395 621.39/5 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | [1st ed.] |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01473nam a2200469zc 4500</leader><controlfield tag="001">BV023046198</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20100326 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">071212s2008 xxuad|| |||| 00||| eng d</controlfield><datafield tag="010" ind1=" " ind2=" "><subfield code="a">2007044293</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781420060942</subfield><subfield code="9">978-1-4200-6094-2</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">1420060945</subfield><subfield code="9">1-4200-6094-5</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)144226528</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)GBV54754507X</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="044" ind1=" " ind2=" "><subfield code="a">xxu</subfield><subfield code="c">US</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-703</subfield><subfield code="a">DE-634</subfield><subfield code="a">DE-859</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7872.L64</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.395</subfield><subfield code="b">Y3I5</subfield><subfield code="2">22</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 195</subfield><subfield code="0">(DE-625)143608:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 5600</subfield><subfield code="0">(DE-625)157468:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Januškevič, Svetlana N.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Introduction to logic design</subfield><subfield code="c">Svetlana N. Yanushkevich ; Vlad P. Shmerko</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">[1st ed.]</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boca Raton</subfield><subfield code="b">CRC Press</subfield><subfield code="c">2008</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XXII, 692 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Diseño lógico</subfield><subfield code="2">lemb</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Dispositivos lógicos</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic devices</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4151278-9</subfield><subfield code="a">Einführung</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Šmerko, Vlad P.</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-016249650</subfield></datafield></record></collection> |
| genre | (DE-588)4151278-9 Einführung gnd-content |
| genre_facet | Einführung |
| id | DE-604.BV023046198 |
| illustrated | Illustrated |
| index_date | 2024-07-02T19:22:38Z |
| indexdate | 2024-07-09T21:09:44Z |
| institution | BVB |
| isbn | 9781420060942 1420060945 |
| language | English |
| lccn | 2007044293 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-016249650 |
| oclc_num | 144226528 |
| open_access_boolean | |
| owner | DE-703 DE-634 DE-859 |
| owner_facet | DE-703 DE-634 DE-859 |
| physical | XXII, 692 S. Ill., graph. Darst. |
| publishDate | 2008 |
| publishDateSearch | 2008 |
| publishDateSort | 2008 |
| publisher | CRC Press |
| record_format | marc |
| spelling | Januškevič, Svetlana N. Verfasser aut Introduction to logic design Svetlana N. Yanushkevich ; Vlad P. Shmerko [1st ed.] Boca Raton CRC Press 2008 XXII, 692 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Diseño lógico lemb Dispositivos lógicos Logic devices Design and construction Logic design Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf (DE-588)4151278-9 Einführung gnd-content Logischer Entwurf (DE-588)4168051-0 s DE-604 Šmerko, Vlad P. Sonstige oth |
| spellingShingle | Januškevič, Svetlana N. Introduction to logic design Diseño lógico lemb Dispositivos lógicos Logic devices Design and construction Logic design Logischer Entwurf (DE-588)4168051-0 gnd |
| subject_GND | (DE-588)4168051-0 (DE-588)4151278-9 |
| title | Introduction to logic design |
| title_auth | Introduction to logic design |
| title_exact_search | Introduction to logic design |
| title_exact_search_txtP | Introduction to logic design |
| title_full | Introduction to logic design Svetlana N. Yanushkevich ; Vlad P. Shmerko |
| title_fullStr | Introduction to logic design Svetlana N. Yanushkevich ; Vlad P. Shmerko |
| title_full_unstemmed | Introduction to logic design Svetlana N. Yanushkevich ; Vlad P. Shmerko |
| title_short | Introduction to logic design |
| title_sort | introduction to logic design |
| topic | Diseño lógico lemb Dispositivos lógicos Logic devices Design and construction Logic design Logischer Entwurf (DE-588)4168051-0 gnd |
| topic_facet | Diseño lógico Dispositivos lógicos Logic devices Design and construction Logic design Logischer Entwurf Einführung |
| work_keys_str_mv | AT januskevicsvetlanan introductiontologicdesign AT smerkovladp introductiontologicdesign |