Processor architecture:
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Manchester
NCC Publ.
1976
|
Ausgabe: | 1. publ. |
Schlagworte: | |
Beschreibung: | 126 S. Ill. |
ISBN: | 085012154X |
Internformat
MARC
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337 | |b n |2 rdamedia | ||
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Datensatz im Suchindex
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adam_txt | |
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author | Lavington, Simon H. |
author_facet | Lavington, Simon H. |
author_role | aut |
author_sort | Lavington, Simon H. |
author_variant | s h l sh shl |
building | Verbundindex |
bvnumber | BV021924870 |
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callnumber-label | QA76 |
callnumber-raw | QA76.9.A73 |
callnumber-search | QA76.9.A73 |
callnumber-sort | QA 276.9 A73 |
callnumber-subject | QA - Mathematics |
ctrlnum | (OCoLC)2947898 (DE-599)BVBBV021924870 |
dewey-full | 001.6/4 004/.3 |
dewey-hundreds | 000 - Computer science, information, general works |
dewey-ones | 001 - Knowledge 004 - Computer science |
dewey-raw | 001.6/4 004/.3 |
dewey-search | 001.6/4 004/.3 |
dewey-sort | 11.6 14 |
dewey-tens | 000 - Computer science, information, general works |
discipline | Allgemeines Informatik |
discipline_str_mv | Allgemeines Informatik |
edition | 1. publ. |
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id | DE-604.BV021924870 |
illustrated | Illustrated |
index_date | 2024-07-02T16:05:56Z |
indexdate | 2024-07-09T20:47:31Z |
institution | BVB |
isbn | 085012154X |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015140027 |
oclc_num | 2947898 |
open_access_boolean | |
owner | DE-706 |
owner_facet | DE-706 |
physical | 126 S. Ill. |
publishDate | 1976 |
publishDateSearch | 1976 |
publishDateSort | 1976 |
publisher | NCC Publ. |
record_format | marc |
spelling | Lavington, Simon H. Verfasser aut Processor architecture by S. H. Lavington 1. publ. Manchester NCC Publ. 1976 126 S. Ill. txt rdacontent n rdamedia nc rdacarrier architecture ordinateur inriac conception unité centrale inriac Computer architecture Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Prozessor (DE-588)4176076-1 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 s DE-604 Prozessor (DE-588)4176076-1 s |
spellingShingle | Lavington, Simon H. Processor architecture architecture ordinateur inriac conception unité centrale inriac Computer architecture Computerarchitektur (DE-588)4048717-9 gnd Prozessor (DE-588)4176076-1 gnd |
subject_GND | (DE-588)4048717-9 (DE-588)4176076-1 |
title | Processor architecture |
title_auth | Processor architecture |
title_exact_search | Processor architecture |
title_exact_search_txtP | Processor architecture |
title_full | Processor architecture by S. H. Lavington |
title_fullStr | Processor architecture by S. H. Lavington |
title_full_unstemmed | Processor architecture by S. H. Lavington |
title_short | Processor architecture |
title_sort | processor architecture |
topic | architecture ordinateur inriac conception unité centrale inriac Computer architecture Computerarchitektur (DE-588)4048717-9 gnd Prozessor (DE-588)4176076-1 gnd |
topic_facet | architecture ordinateur conception unité centrale Computer architecture Computerarchitektur Prozessor |
work_keys_str_mv | AT lavingtonsimonh processorarchitecture |