Logic design and switching theory:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York [u.a.]
Wiley
1979
|
| Ausgabe: | 1. print. |
| Schriftenreihe: | Wiley-Interscience publication
|
| Schlagworte: | |
| Beschreibung: | 617 S. |
| ISBN: | 0471044180 |
Internformat
MARC
| LEADER | 00000nam a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV021920921 | ||
| 003 | DE-604 | ||
| 005 | 20040301000000.0 | ||
| 007 | t | ||
| 008 | 941013s1979 |||| 00||| eng d | ||
| 020 | |a 0471044180 |9 0-471-04418-0 | ||
| 035 | |a (OCoLC)4195084 | ||
| 035 | |a (DE-599)BVBBV021920921 | ||
| 040 | |a DE-604 |b ger | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-706 | ||
| 050 | 0 | |a TK7868.L6 | |
| 082 | 0 | |a 621.3815/37 | |
| 082 | 0 | |a 621.381/73/7 |2 18 | |
| 100 | 1 | |a Muroga, Saburo |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Logic design and switching theory |c Saburo Muroga |
| 250 | |a 1. print. | ||
| 264 | 1 | |a New York [u.a.] |b Wiley |c 1979 | |
| 300 | |a 617 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Wiley-Interscience publication | |
| 650 | 4 | |a Circuits intégrés à grande échelle | |
| 650 | 7 | |a Circuits intégrés |2 ram | |
| 650 | 4 | |a Circuits logiques | |
| 650 | 4 | |a Circuits électroniques - Calcul - Informatique | |
| 650 | 7 | |a Circuits électroniques |2 ram | |
| 650 | 4 | |a Commutation, Théorie de la | |
| 650 | 4 | |a Structure logique | |
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Electronic circuit design |x Data processing | |
| 650 | 4 | |a Integrated circuits |x Large scale integration | |
| 650 | 4 | |a Logic circuits | |
| 650 | 4 | |a Logic design | |
| 650 | 4 | |a Switching theory | |
| 650 | 0 | 7 | |a Logische Schaltung |0 (DE-588)4131023-8 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Schaltungstheorie |0 (DE-588)4179392-4 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Logische Schaltung |0 (DE-588)4131023-8 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Schaltungstheorie |0 (DE-588)4179392-4 |D s |
| 689 | 1 | |8 1\p |5 DE-604 | |
| 689 | 2 | 0 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 2 | |8 2\p |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-015136083 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 883 | 1 | |8 2\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
| _version_ | 1804135874079752192 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Muroga, Saburo |
| author_facet | Muroga, Saburo |
| author_role | aut |
| author_sort | Muroga, Saburo |
| author_variant | s m sm |
| building | Verbundindex |
| bvnumber | BV021920921 |
| callnumber-first | T - Technology |
| callnumber-label | TK7868 |
| callnumber-raw | TK7868.L6 |
| callnumber-search | TK7868.L6 |
| callnumber-sort | TK 47868 L6 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| ctrlnum | (OCoLC)4195084 (DE-599)BVBBV021920921 |
| dewey-full | 621.3815/37 621.381/73/7 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815/37 621.381/73/7 |
| dewey-search | 621.3815/37 621.381/73/7 |
| dewey-sort | 3621.3815 237 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 1. print. |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02021nam a2200601zc 4500</leader><controlfield tag="001">BV021920921</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20040301000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">941013s1979 |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0471044180</subfield><subfield code="9">0-471-04418-0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)4195084</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV021920921</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-706</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7868.L6</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815/37</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381/73/7</subfield><subfield code="2">18</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Muroga, Saburo</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Logic design and switching theory</subfield><subfield code="c">Saburo Muroga</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">1. print.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York [u.a.]</subfield><subfield code="b">Wiley</subfield><subfield code="c">1979</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">617 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Wiley-Interscience publication</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à grande échelle</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuits intégrés</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits logiques</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits électroniques - Calcul - Informatique</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuits électroniques</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Commutation, Théorie de la</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Structure logique</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Datenverarbeitung</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuit design</subfield><subfield code="x">Data processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Large scale integration</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Switching theory</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungstheorie</subfield><subfield code="0">(DE-588)4179392-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Schaltungstheorie</subfield><subfield code="0">(DE-588)4179392-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-015136083</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| id | DE-604.BV021920921 |
| illustrated | Not Illustrated |
| index_date | 2024-07-02T16:05:44Z |
| indexdate | 2024-07-09T20:47:26Z |
| institution | BVB |
| isbn | 0471044180 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-015136083 |
| oclc_num | 4195084 |
| open_access_boolean | |
| owner | DE-706 |
| owner_facet | DE-706 |
| physical | 617 S. |
| publishDate | 1979 |
| publishDateSearch | 1979 |
| publishDateSort | 1979 |
| publisher | Wiley |
| record_format | marc |
| series2 | Wiley-Interscience publication |
| spelling | Muroga, Saburo Verfasser aut Logic design and switching theory Saburo Muroga 1. print. New York [u.a.] Wiley 1979 617 S. txt rdacontent n rdamedia nc rdacarrier Wiley-Interscience publication Circuits intégrés à grande échelle Circuits intégrés ram Circuits logiques Circuits électroniques - Calcul - Informatique Circuits électroniques ram Commutation, Théorie de la Structure logique Datenverarbeitung Electronic circuit design Data processing Integrated circuits Large scale integration Logic circuits Logic design Switching theory Logische Schaltung (DE-588)4131023-8 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Schaltungstheorie (DE-588)4179392-4 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 s DE-604 Schaltungstheorie (DE-588)4179392-4 s 1\p DE-604 Logischer Entwurf (DE-588)4168051-0 s 2\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Muroga, Saburo Logic design and switching theory Circuits intégrés à grande échelle Circuits intégrés ram Circuits logiques Circuits électroniques - Calcul - Informatique Circuits électroniques ram Commutation, Théorie de la Structure logique Datenverarbeitung Electronic circuit design Data processing Integrated circuits Large scale integration Logic circuits Logic design Switching theory Logische Schaltung (DE-588)4131023-8 gnd Logischer Entwurf (DE-588)4168051-0 gnd Schaltungstheorie (DE-588)4179392-4 gnd |
| subject_GND | (DE-588)4131023-8 (DE-588)4168051-0 (DE-588)4179392-4 |
| title | Logic design and switching theory |
| title_auth | Logic design and switching theory |
| title_exact_search | Logic design and switching theory |
| title_exact_search_txtP | Logic design and switching theory |
| title_full | Logic design and switching theory Saburo Muroga |
| title_fullStr | Logic design and switching theory Saburo Muroga |
| title_full_unstemmed | Logic design and switching theory Saburo Muroga |
| title_short | Logic design and switching theory |
| title_sort | logic design and switching theory |
| topic | Circuits intégrés à grande échelle Circuits intégrés ram Circuits logiques Circuits électroniques - Calcul - Informatique Circuits électroniques ram Commutation, Théorie de la Structure logique Datenverarbeitung Electronic circuit design Data processing Integrated circuits Large scale integration Logic circuits Logic design Switching theory Logische Schaltung (DE-588)4131023-8 gnd Logischer Entwurf (DE-588)4168051-0 gnd Schaltungstheorie (DE-588)4179392-4 gnd |
| topic_facet | Circuits intégrés à grande échelle Circuits intégrés Circuits logiques Circuits électroniques - Calcul - Informatique Circuits électroniques Commutation, Théorie de la Structure logique Datenverarbeitung Electronic circuit design Data processing Integrated circuits Large scale integration Logic circuits Logic design Switching theory Logische Schaltung Logischer Entwurf Schaltungstheorie |
| work_keys_str_mv | AT murogasaburo logicdesignandswitchingtheory |