Logical effort: designing fast CMOS Circuits
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
San Francisco [u.a.]
Morgan Kaufmann
2001
|
| Ausgabe: | [Nachdr.] |
| Schlagworte: | |
| Beschreibung: | XV, 239 S.: Ill., graph. Darst. |
| ISBN: | 1558605576 |
Internformat
MARC
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| 100 | 1 | |a Sutherland, Ivan E. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Logical effort |b designing fast CMOS Circuits |c Ivan Sutherland ; Bob Sproull ; David Harris |
| 250 | |a [Nachdr.] | ||
| 264 | 1 | |a San Francisco [u.a.] |b Morgan Kaufmann |c 2001 | |
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| 689 | 0 | 0 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |D s |
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Datensatz im Suchindex
| _version_ | 1806052766606426112 |
|---|---|
| adam_text | |
| adam_txt | |
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| author | Sutherland, Ivan E. Sproull, Robert Harris, David Money 19XX- |
| author_GND | (DE-588)173938035 |
| author_facet | Sutherland, Ivan E. Sproull, Robert Harris, David Money 19XX- |
| author_role | aut aut aut |
| author_sort | Sutherland, Ivan E. |
| author_variant | i e s ie ies r s rs d m h dm dmh |
| building | Verbundindex |
| bvnumber | BV021648951 |
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| classification_tum | ELT 358f ELT 272f ELT 273f |
| ctrlnum | (OCoLC)634345959 (DE-599)BVBBV021648951 |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | [Nachdr.] |
| format | Book |
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| id | DE-604.BV021648951 |
| illustrated | Not Illustrated |
| index_date | 2024-07-02T15:02:22Z |
| indexdate | 2024-07-31T00:35:37Z |
| institution | BVB |
| isbn | 1558605576 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-014863627 |
| oclc_num | 634345959 |
| open_access_boolean | |
| owner | DE-29T |
| owner_facet | DE-29T |
| physical | XV, 239 S.: Ill., graph. Darst. |
| publishDate | 2001 |
| publishDateSearch | 2001 |
| publishDateSort | 2001 |
| publisher | Morgan Kaufmann |
| record_format | marc |
| spelling | Sutherland, Ivan E. Verfasser aut Logical effort designing fast CMOS Circuits Ivan Sutherland ; Bob Sproull ; David Harris [Nachdr.] San Francisco [u.a.] Morgan Kaufmann 2001 XV, 239 S.: Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 s Logischer Entwurf (DE-588)4168051-0 s DE-604 Sproull, Robert Verfasser aut Harris, David Money 19XX- Verfasser (DE-588)173938035 aut |
| spellingShingle | Sutherland, Ivan E. Sproull, Robert Harris, David Money 19XX- Logical effort designing fast CMOS Circuits Logischer Entwurf (DE-588)4168051-0 gnd CMOS-Schaltung (DE-588)4148111-2 gnd |
| subject_GND | (DE-588)4168051-0 (DE-588)4148111-2 |
| title | Logical effort designing fast CMOS Circuits |
| title_auth | Logical effort designing fast CMOS Circuits |
| title_exact_search | Logical effort designing fast CMOS Circuits |
| title_exact_search_txtP | Logical effort designing fast CMOS Circuits |
| title_full | Logical effort designing fast CMOS Circuits Ivan Sutherland ; Bob Sproull ; David Harris |
| title_fullStr | Logical effort designing fast CMOS Circuits Ivan Sutherland ; Bob Sproull ; David Harris |
| title_full_unstemmed | Logical effort designing fast CMOS Circuits Ivan Sutherland ; Bob Sproull ; David Harris |
| title_short | Logical effort |
| title_sort | logical effort designing fast cmos circuits |
| title_sub | designing fast CMOS Circuits |
| topic | Logischer Entwurf (DE-588)4168051-0 gnd CMOS-Schaltung (DE-588)4148111-2 gnd |
| topic_facet | Logischer Entwurf CMOS-Schaltung |
| work_keys_str_mv | AT sutherlandivane logicaleffortdesigningfastcmoscircuits AT sproullrobert logicaleffortdesigningfastcmoscircuits AT harrisdavidmoney logicaleffortdesigningfastcmoscircuits |