Holdings: A floating-point to fixed-point design flow for high performance digital signal processors

A floating-point to fixed-point design flow for high performance digital signal processors:

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Bibliographic Details
Main Author:	Coors, Martin 1970- (Author)
Format:	Thesis Book
Language:	English
Published:	Aachen Shaker 2005
Series:	Berichte aus der Elektrotechnik
Subjects:	Codegenerierung Datenflussarchitektur Compiler Gleitkommarechnung Festkommarechnung Codeoptimierung Benchmark Transformationscodierung Signalprozessor SystemC Hochschulschrift
Online Access:	Inhaltsverzeichnis
Physical Description:	IV, 125 S. graph. Darst. 21 cm, 195 gr.
ISBN:	3832238921

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MARC


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adam_text	BERICHTE AUS DER ELEKTROTECHNIK MARTIN COORS A FLOATING-POINT TO FIXED-POINT DESIGN FLOW FOR HIGH PERFORMANCE DIGITAL SIGNAL PROCESSORS D 82 (DISS.RWTH AACHEN) SHAKER VERLAG AACHEN 2005 CONTENTS 1 INTRODUCTION 1 1.1 DSP ARCHITECTURES 3 1.2 DSP COMPILERS 4 1.3 FIXED-POINT DESIGN FLOW 6 2 RELATEDWORK 10 2.1 DIRECT GENERATION OF TARGET ASSEMBLY CODE 12 2.2 GENERATION OF TARGET ASSEMBLY CODE UTILIZING A COMPILER ENVIRONMENT 13 2.3 GENERATION OF TARGET-OPTIMIZED C-CODE TARGETING A VENDOR COMPILER 15 2.4 GENERATION OF GENERIC C-CODE 16 3 MOTIVATION 17 4 THE FRIDGE DESIGN FLOW 21 4.1 FIXED-POINT DATA TYPES AND LOCAL ANNOTATIONS 23 4.1.1 THE DATA TYPES SCJIXED AND SC.UFIXED 24 4.1.2 THE DATA TYPE SC.FXVAL 25 4.1.3 THE DATA TYPES SC.FIX AND SC_UFIX 25 4.1.4 CAST MODES 25 4.2 INTERPOLATION 26 4.3 FRIDGE BACK ENDS 28 4.4 TRANSFORMATION TO INTEGER C-CODE 29 4.4.1 LBPAIIGNMENT 30 II CONTENTS 4.4.2 THE LBP ALIGNMENT ALGORITHM 31 4.4.3 DATA TYPE SELECTION 32 4.4.3.1 BASIC CONSTRAINTS FOR ANY DATA ELEMENT 32 4.4.3.2 STRUCTURAL CONSTRAINTS 32 4.4.3.3 SEMANTICAL CONSTRAINTS 32 4.4.4 CAST MODE TRANSFORMATION 33 4.4.4.1 OVERFLOW HANDLING 33 4.4.4.2 QUANTIZATION HANDLING 33 5 TARGET ARCHITECTURES AND COMPILER EVALUATION 34 5.1 TEXAS INSTRUMENTS C6000 PROCESSOR FAMILY 34 5.1.1 TEXAS INSTRUMENTS C6000 C-COMPILER 37 5.2 MOTOROLA / AGERE STARCORE PROCESSOR FAMILY 41 5.2.1 CODEWARRIOR COMPILER 43 5.3 COMPILER EVALUATION 43 5.3.1 DSPSTONE COMPILER BENCHMARK METHODOLOGY 44 5.3.2 DSPSTONE METHODOLOGY ADAPTED FOR C62X 45 5.3.2.1 TOOLS USED 46 5.3.2.2 BENCHMARK KERNELS 47 5.3.3 EVALUATION RESULTS 48 5.3.4 LESSONS LEARNED 53 6 DATA FLOW ANALYSIS 55 6.1 ANALYSIS BY ABSTRACT EXECUTION 56 6.1.1 DATA ABSTRACTION 57 6.1.2 THE STATE CONTROLLED MEMORY MODEL 58 6.1.3 ITERATING OVER AMBIGUITIES 59 6.1.4 DU- AND UD-CHAINS 60 6.1.5 OPERATION BASED DATA FLOW ANALYSIS 62 6.1.6 ITERATION VECTORS 62 CONTENTS III 7 SCALING SHIRTS 64 7.1 LBPAIIGNMENT 64 7.2 SHIFT OPERATIONS AND VLIW DSP ARCHITECTURES 65 7.3 SHIFT REDUECTION 66 7.3.1 PUBLISHED APPROACHES 66 7.3.2 COST FUNCTION 67 7.3.3 EXPERIMENTAL RESULTS 68 7.3.4 CONSEQUENCES 71 8 CAST OPERATIONS 72 9 CODE RESTRUCTURING TRANSFORMATIONS 79 9.1 CODE RESTRUCTURING INFRASTRUCTURE 79 9.1.1 DECLARATION OF NEW VARIABLES 80 9.1.2 INSERTION OF NEW STATEMENTS 80 9.1.3 CLONE FUNCTIONALITY 80 9.1.4 REPLACEMENT MANAGEMENT 80 9.2 LOOP RESTRUCTURING TRANSFORMATIONS 81 9.2.1 LOOP UNROLLING 82 9.2.2 SCALAR EXPANSION 84 9.2.3 LOOP FUSION 86 9.2.4 SIMD INTRINSICS 87 9.3 OTHER OPTIMIZATIONS 92 9.3.1 ASSERTION INSERTION 92 9.3.2 CONST KEYWORD INSERTION 93 9.3.3 CONSTANT PROPAGATION 94 9.4 OPTIMIZATION SCHEDULING 95 10 VALIDATION 97 11 EXPERIMENTAL RESULTS 101 IV CONTENTS 11.0.1 OFF-THE-SHELF KERNELS 101 11.0.2 TL COMPILER BENCHMARKING KERNELS 103 12 CONCLUSIONS AND OUTLOOK 108 A GERMAN SUMMARY - DEUTSCHE ZUSAMMENFASSUNG 110 A.1 EINFUEHRUNG 110 A.2 DIE FRIDGE ENTWURFSUMGEBUNG 113 A.3 COMPILEREVALUIERUNG 114 A.4 SHIFT- UND CASTOPTIMIERUNG 115 A.5 CODE RESTRUKTURIERUNG 116 A.6 EXPERIMENTELLE ERGEBNISSE 117 A.7 ZUSAMMENFASSUNG 119
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author	Coors, Martin 1970-
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author_facet	Coors, Martin 1970-
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dewey-hundreds	000 - Computer science, information, general works 600 - Technology (Applied sciences)
dewey-ones	004 - Computer science 620 - Engineering and allied operations
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dewey-tens	000 - Computer science, information, general works 620 - Engineering and allied operations
discipline	Maschinenbau / Maschinenwesen Informatik
format	Thesis Book
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isbn	3832238921
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physical	IV, 125 S. graph. Darst. 21 cm, 195 gr.
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series2	Berichte aus der Elektrotechnik
spelling	Coors, Martin 1970- Verfasser (DE-588)130022993 aut A floating-point to fixed-point design flow for high performance digital signal processors Martin Coors Aachen Shaker 2005 IV, 125 S. graph. Darst. 21 cm, 195 gr. txt rdacontent n rdamedia nc rdacarrier Berichte aus der Elektrotechnik Zugl.: Aachen, Techn. Hochsch., Diss., 2004 Codegenerierung (DE-588)4010346-8 gnd rswk-swf Datenflussarchitektur (DE-588)4247883-2 gnd rswk-swf Compiler (DE-588)4148248-7 gnd rswk-swf Gleitkommarechnung (DE-588)4157582-9 gnd rswk-swf Festkommarechnung (DE-588)4485705-6 gnd rswk-swf Codeoptimierung (DE-588)4010348-1 gnd rswk-swf Benchmark (DE-588)4144457-7 gnd rswk-swf Transformationscodierung (DE-588)4135035-2 gnd rswk-swf Signalprozessor (DE-588)4054943-4 gnd rswk-swf SystemC (DE-588)4737678-8 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Gleitkommarechnung (DE-588)4157582-9 s Transformationscodierung (DE-588)4135035-2 s Festkommarechnung (DE-588)4485705-6 s Codeoptimierung (DE-588)4010348-1 s Datenflussarchitektur (DE-588)4247883-2 s Signalprozessor (DE-588)4054943-4 s DE-604 SystemC (DE-588)4737678-8 s Codegenerierung (DE-588)4010346-8 s Compiler (DE-588)4148248-7 s Benchmark (DE-588)4144457-7 s HEBIS Datenaustausch Darmstadt application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=013834304&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis
spellingShingle	Coors, Martin 1970- A floating-point to fixed-point design flow for high performance digital signal processors Codegenerierung (DE-588)4010346-8 gnd Datenflussarchitektur (DE-588)4247883-2 gnd Compiler (DE-588)4148248-7 gnd Gleitkommarechnung (DE-588)4157582-9 gnd Festkommarechnung (DE-588)4485705-6 gnd Codeoptimierung (DE-588)4010348-1 gnd Benchmark (DE-588)4144457-7 gnd Transformationscodierung (DE-588)4135035-2 gnd Signalprozessor (DE-588)4054943-4 gnd SystemC (DE-588)4737678-8 gnd
subject_GND	(DE-588)4010346-8 (DE-588)4247883-2 (DE-588)4148248-7 (DE-588)4157582-9 (DE-588)4485705-6 (DE-588)4010348-1 (DE-588)4144457-7 (DE-588)4135035-2 (DE-588)4054943-4 (DE-588)4737678-8 (DE-588)4113937-9
title	A floating-point to fixed-point design flow for high performance digital signal processors
title_auth	A floating-point to fixed-point design flow for high performance digital signal processors
title_exact_search	A floating-point to fixed-point design flow for high performance digital signal processors
title_full	A floating-point to fixed-point design flow for high performance digital signal processors Martin Coors
title_fullStr	A floating-point to fixed-point design flow for high performance digital signal processors Martin Coors
title_full_unstemmed	A floating-point to fixed-point design flow for high performance digital signal processors Martin Coors
title_short	A floating-point to fixed-point design flow for high performance digital signal processors
title_sort	a floating point to fixed point design flow for high performance digital signal processors
topic	Codegenerierung (DE-588)4010346-8 gnd Datenflussarchitektur (DE-588)4247883-2 gnd Compiler (DE-588)4148248-7 gnd Gleitkommarechnung (DE-588)4157582-9 gnd Festkommarechnung (DE-588)4485705-6 gnd Codeoptimierung (DE-588)4010348-1 gnd Benchmark (DE-588)4144457-7 gnd Transformationscodierung (DE-588)4135035-2 gnd Signalprozessor (DE-588)4054943-4 gnd SystemC (DE-588)4737678-8 gnd
topic_facet	Codegenerierung Datenflussarchitektur Compiler Gleitkommarechnung Festkommarechnung Codeoptimierung Benchmark Transformationscodierung Signalprozessor SystemC Hochschulschrift
url	http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=013834304&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA
work_keys_str_mv	AT coorsmartin afloatingpointtofixedpointdesignflowforhighperformancedigitalsignalprocessors

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