Digital design:
CD-ROM contains: WaveFormer Pro (interactive HDL simulator, timing diagram editor, VHDL, Verilog, & SPICE stimulus generator) -- VeriLogger Pro (Verilog simulator with unit level test environment) -- TestBencher Pro (generates reactive VHDL and Verilog test benches from timing diagrams, detects...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Upper Saddle River, NJ
Prentice-Hall
2002
|
| Ausgabe: | 3rd ed. |
| Schlagworte: | |
| Zusammenfassung: | CD-ROM contains: WaveFormer Pro (interactive HDL simulator, timing diagram editor, VHDL, Verilog, & SPICE stimulus generator) -- VeriLogger Pro (Verilog simulator with unit level test environment) -- TestBencher Pro (generates reactive VHDL and Verilog test benches from timing diagrams, detects glitches, bad data, & timing violations) -- DataSheet Pro (data book design environment with OLE & TDML support) -- TimingDiagrammer Pro (timing diagram editor with TDML). |
| Beschreibung: | Includes index. - Begleit-CD-ROM u.d.T.: Synapticad |
| Beschreibung: | XII, 516 S. Ill. 1 CD-ROM (12 cm) |
| ISBN: | 0130355259 0130621218 0130646237 |
Internformat
MARC
| LEADER | 00000nam a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV014439284 | ||
| 003 | DE-604 | ||
| 005 | 20090223 | ||
| 007 | t | ||
| 008 | 020603s2002 xxua||| |||| 00||| eng d | ||
| 010 | |a 2002276849 | ||
| 020 | |a 0130355259 |9 0-13-035525-9 | ||
| 020 | |a 0130621218 |9 0-13-062121-8 | ||
| 020 | |a 0130646237 |9 0-13-064623-7 | ||
| 035 | |a (OCoLC)48554247 | ||
| 035 | |a (DE-599)BVBBV014439284 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 044 | |a xxu |c US | ||
| 049 | |a DE-29T |a DE-91 |a DE-706 |a DE-522 | ||
| 050 | 0 | |a TK7888.3 | |
| 082 | 0 | |a 621.381537 | |
| 084 | |a ST 195 |0 (DE-625)143608: |2 rvk | ||
| 084 | |a ZN 5620 |0 (DE-625)157469: |2 rvk | ||
| 084 | |a ELT 450f |2 stub | ||
| 100 | 1 | |a Mano, M. Morris |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Digital design |c M. Morris Mano |
| 246 | 1 | 3 | |a Synapticad |
| 250 | |a 3rd ed. | ||
| 264 | 1 | |a Upper Saddle River, NJ |b Prentice-Hall |c 2002 | |
| 300 | |a XII, 516 S. |b Ill. |e 1 CD-ROM (12 cm) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 500 | |a Includes index. - Begleit-CD-ROM u.d.T.: Synapticad | ||
| 520 | 3 | |a CD-ROM contains: WaveFormer Pro (interactive HDL simulator, timing diagram editor, VHDL, Verilog, & SPICE stimulus generator) -- VeriLogger Pro (Verilog simulator with unit level test environment) -- TestBencher Pro (generates reactive VHDL and Verilog test benches from timing diagrams, detects glitches, bad data, & timing violations) -- DataSheet Pro (data book design environment with OLE & TDML support) -- TimingDiagrammer Pro (timing diagram editor with TDML). | |
| 650 | 4 | |a Digital integrated circuits | |
| 650 | 4 | |a Electronic digital computers |x Circuits | |
| 650 | 4 | |a Logic circuits | |
| 650 | 4 | |a Logic design | |
| 650 | 0 | 7 | |a Logische Schaltung |0 (DE-588)4131023-8 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Digitaltechnik |0 (DE-588)4012303-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Computer |0 (DE-588)4070083-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Digitalschaltung |0 (DE-588)4012295-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Digitalschaltung |0 (DE-588)4012295-5 |D s |
| 689 | 0 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Digitaltechnik |0 (DE-588)4012303-0 |D s |
| 689 | 1 | 1 | |a Logische Schaltung |0 (DE-588)4131023-8 |D s |
| 689 | 1 | 2 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
| 689 | 1 | |5 DE-604 | |
| 689 | 2 | 0 | |a Digitalschaltung |0 (DE-588)4012295-5 |D s |
| 689 | 2 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 2 | |8 1\p |5 DE-604 | |
| 689 | 3 | 0 | |a Computer |0 (DE-588)4070083-5 |D s |
| 689 | 3 | 1 | |a Logische Schaltung |0 (DE-588)4131023-8 |D s |
| 689 | 3 | |8 2\p |5 DE-604 | |
| 689 | 4 | 0 | |a Digitale integrierte Schaltung |0 (DE-588)4113313-4 |D s |
| 689 | 4 | |8 3\p |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-009869473 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 883 | 1 | |8 2\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 883 | 1 | |8 3\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
| _version_ | 1804129288927051776 |
|---|---|
| any_adam_object | |
| author | Mano, M. Morris |
| author_facet | Mano, M. Morris |
| author_role | aut |
| author_sort | Mano, M. Morris |
| author_variant | m m m mm mmm |
| building | Verbundindex |
| bvnumber | BV014439284 |
| callnumber-first | T - Technology |
| callnumber-label | TK7888 |
| callnumber-raw | TK7888.3 |
| callnumber-search | TK7888.3 |
| callnumber-sort | TK 47888.3 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 195 ZN 5620 |
| classification_tum | ELT 450f |
| ctrlnum | (OCoLC)48554247 (DE-599)BVBBV014439284 |
| dewey-full | 621.381537 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381537 |
| dewey-search | 621.381537 |
| dewey-sort | 3621.381537 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 3rd ed. |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03226nam a2200757zc 4500</leader><controlfield tag="001">BV014439284</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20090223 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">020603s2002 xxua||| |||| 00||| eng d</controlfield><datafield tag="010" ind1=" " ind2=" "><subfield code="a">2002276849</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0130355259</subfield><subfield code="9">0-13-035525-9</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0130621218</subfield><subfield code="9">0-13-062121-8</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0130646237</subfield><subfield code="9">0-13-064623-7</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)48554247</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV014439284</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="044" ind1=" " ind2=" "><subfield code="a">xxu</subfield><subfield code="c">US</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield><subfield code="a">DE-91</subfield><subfield code="a">DE-706</subfield><subfield code="a">DE-522</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7888.3</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381537</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 195</subfield><subfield code="0">(DE-625)143608:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 5620</subfield><subfield code="0">(DE-625)157469:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 450f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Mano, M. Morris</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Digital design</subfield><subfield code="c">M. Morris Mano</subfield></datafield><datafield tag="246" ind1="1" ind2="3"><subfield code="a">Synapticad</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">3rd ed.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Upper Saddle River, NJ</subfield><subfield code="b">Prentice-Hall</subfield><subfield code="c">2002</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XII, 516 S.</subfield><subfield code="b">Ill.</subfield><subfield code="e">1 CD-ROM (12 cm)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Includes index. - Begleit-CD-ROM u.d.T.: Synapticad</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">CD-ROM contains: WaveFormer Pro (interactive HDL simulator, timing diagram editor, VHDL, Verilog, & SPICE stimulus generator) -- VeriLogger Pro (Verilog simulator with unit level test environment) -- TestBencher Pro (generates reactive VHDL and Verilog test benches from timing diagrams, detects glitches, bad data, & timing violations) -- DataSheet Pro (data book design environment with OLE & TDML support) -- TimingDiagrammer Pro (timing diagram editor with TDML).</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Digital integrated circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic digital computers</subfield><subfield code="x">Circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitaltechnik</subfield><subfield code="0">(DE-588)4012303-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Computer</subfield><subfield code="0">(DE-588)4070083-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitalschaltung</subfield><subfield code="0">(DE-588)4012295-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Digitalschaltung</subfield><subfield code="0">(DE-588)4012295-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Digitaltechnik</subfield><subfield code="0">(DE-588)4012303-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="2"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">Digitalschaltung</subfield><subfield code="0">(DE-588)4012295-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2="1"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="3" ind2="0"><subfield code="a">Computer</subfield><subfield code="0">(DE-588)4070083-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="3" ind2="1"><subfield code="a">Logische Schaltung</subfield><subfield code="0">(DE-588)4131023-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="3" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="4" ind2="0"><subfield code="a">Digitale integrierte Schaltung</subfield><subfield code="0">(DE-588)4113313-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="4" ind2=" "><subfield code="8">3\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-009869473</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">3\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| id | DE-604.BV014439284 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T19:02:46Z |
| institution | BVB |
| isbn | 0130355259 0130621218 0130646237 |
| language | English |
| lccn | 2002276849 |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-009869473 |
| oclc_num | 48554247 |
| open_access_boolean | |
| owner | DE-29T DE-91 DE-BY-TUM DE-706 DE-522 |
| owner_facet | DE-29T DE-91 DE-BY-TUM DE-706 DE-522 |
| physical | XII, 516 S. Ill. 1 CD-ROM (12 cm) |
| publishDate | 2002 |
| publishDateSearch | 2002 |
| publishDateSort | 2002 |
| publisher | Prentice-Hall |
| record_format | marc |
| spelling | Mano, M. Morris Verfasser aut Digital design M. Morris Mano Synapticad 3rd ed. Upper Saddle River, NJ Prentice-Hall 2002 XII, 516 S. Ill. 1 CD-ROM (12 cm) txt rdacontent n rdamedia nc rdacarrier Includes index. - Begleit-CD-ROM u.d.T.: Synapticad CD-ROM contains: WaveFormer Pro (interactive HDL simulator, timing diagram editor, VHDL, Verilog, & SPICE stimulus generator) -- VeriLogger Pro (Verilog simulator with unit level test environment) -- TestBencher Pro (generates reactive VHDL and Verilog test benches from timing diagrams, detects glitches, bad data, & timing violations) -- DataSheet Pro (data book design environment with OLE & TDML support) -- TimingDiagrammer Pro (timing diagram editor with TDML). Digital integrated circuits Electronic digital computers Circuits Logic circuits Logic design Logische Schaltung (DE-588)4131023-8 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Digitaltechnik (DE-588)4012303-0 gnd rswk-swf Computer (DE-588)4070083-5 gnd rswk-swf Digitalschaltung (DE-588)4012295-5 gnd rswk-swf Digitale integrierte Schaltung (DE-588)4113313-4 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Digitalschaltung (DE-588)4012295-5 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 Digitaltechnik (DE-588)4012303-0 s Logische Schaltung (DE-588)4131023-8 s Logischer Entwurf (DE-588)4168051-0 s 1\p DE-604 Computer (DE-588)4070083-5 s 2\p DE-604 Digitale integrierte Schaltung (DE-588)4113313-4 s 3\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 3\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Mano, M. Morris Digital design Digital integrated circuits Electronic digital computers Circuits Logic circuits Logic design Logische Schaltung (DE-588)4131023-8 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Digitaltechnik (DE-588)4012303-0 gnd Computer (DE-588)4070083-5 gnd Digitalschaltung (DE-588)4012295-5 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| subject_GND | (DE-588)4131023-8 (DE-588)4179389-4 (DE-588)4012303-0 (DE-588)4070083-5 (DE-588)4012295-5 (DE-588)4113313-4 (DE-588)4168051-0 |
| title | Digital design |
| title_alt | Synapticad |
| title_auth | Digital design |
| title_exact_search | Digital design |
| title_full | Digital design M. Morris Mano |
| title_fullStr | Digital design M. Morris Mano |
| title_full_unstemmed | Digital design M. Morris Mano |
| title_short | Digital design |
| title_sort | digital design |
| topic | Digital integrated circuits Electronic digital computers Circuits Logic circuits Logic design Logische Schaltung (DE-588)4131023-8 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Digitaltechnik (DE-588)4012303-0 gnd Computer (DE-588)4070083-5 gnd Digitalschaltung (DE-588)4012295-5 gnd Digitale integrierte Schaltung (DE-588)4113313-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| topic_facet | Digital integrated circuits Electronic digital computers Circuits Logic circuits Logic design Logische Schaltung Schaltungsentwurf Digitaltechnik Computer Digitalschaltung Digitale integrierte Schaltung Logischer Entwurf |
| work_keys_str_mv | AT manommorris digitaldesign AT manommorris synapticad |