High level power analysis and optimization:
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston, Mass.
Kluwer
1998
|
| Schlagworte: | |
| Beschreibung: | XVI, 175 S. graph. Darst. |
| ISBN: | 0792380738 |
Internformat
MARC
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| 020 | |a 0792380738 |9 0-7923-8073-8 | ||
| 035 | |a (OCoLC)37725630 | ||
| 035 | |a (DE-599)BVBBV011927119 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91 |a DE-29T |a DE-83 | ||
| 050 | 0 | |a TK7874.66 | |
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| 084 | |a ZN 4900 |0 (DE-625)157417: |2 rvk | ||
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| 100 | 1 | |a Raghunathan, Anand |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a High level power analysis and optimization |c by Anand Raghunathan ; Niraj K. Jha ; Sujit Dey |
| 246 | 1 | 3 | |a High-level power analysis and optimization |
| 264 | 1 | |a Boston, Mass. |b Kluwer |c 1998 | |
| 300 | |a XVI, 175 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
| 650 | 4 | |a Low voltage integrated circuits |x Computer-aided design | |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Energieverbrauch |0 (DE-588)4014733-2 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Energieverbrauch |0 (DE-588)4014733-2 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Jha, Niraj K. |e Verfasser |4 aut | |
| 700 | 1 | |a Dey, Sujit |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-008061109 | ||
Datensatz im Suchindex
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| any_adam_object | |
| author | Raghunathan, Anand Jha, Niraj K. Dey, Sujit |
| author_facet | Raghunathan, Anand Jha, Niraj K. Dey, Sujit |
| author_role | aut aut aut |
| author_sort | Raghunathan, Anand |
| author_variant | a r ar n k j nk nkj s d sd |
| building | Verbundindex |
| bvnumber | BV011927119 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874.66 |
| callnumber-search | TK7874.66 |
| callnumber-sort | TK 47874.66 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 4900 |
| classification_tum | ELT 800f |
| ctrlnum | (OCoLC)37725630 (DE-599)BVBBV011927119 |
| dewey-full | 621.381/044 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381/044 |
| dewey-search | 621.381/044 |
| dewey-sort | 3621.381 244 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV011927119 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T18:18:39Z |
| institution | BVB |
| isbn | 0792380738 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-008061109 |
| oclc_num | 37725630 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM DE-29T DE-83 |
| owner_facet | DE-91 DE-BY-TUM DE-29T DE-83 |
| physical | XVI, 175 S. graph. Darst. |
| publishDate | 1998 |
| publishDateSearch | 1998 |
| publishDateSort | 1998 |
| publisher | Kluwer |
| record_format | marc |
| spelling | Raghunathan, Anand Verfasser aut High level power analysis and optimization by Anand Raghunathan ; Niraj K. Jha ; Sujit Dey High-level power analysis and optimization Boston, Mass. Kluwer 1998 XVI, 175 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Integrated circuits Very large scale integration Computer-aided design Low voltage integrated circuits Computer-aided design VLSI (DE-588)4117388-0 gnd rswk-swf Energieverbrauch (DE-588)4014733-2 gnd rswk-swf VLSI (DE-588)4117388-0 s Energieverbrauch (DE-588)4014733-2 s DE-604 Jha, Niraj K. Verfasser aut Dey, Sujit Verfasser aut |
| spellingShingle | Raghunathan, Anand Jha, Niraj K. Dey, Sujit High level power analysis and optimization Integrated circuits Very large scale integration Computer-aided design Low voltage integrated circuits Computer-aided design VLSI (DE-588)4117388-0 gnd Energieverbrauch (DE-588)4014733-2 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4014733-2 |
| title | High level power analysis and optimization |
| title_alt | High-level power analysis and optimization |
| title_auth | High level power analysis and optimization |
| title_exact_search | High level power analysis and optimization |
| title_full | High level power analysis and optimization by Anand Raghunathan ; Niraj K. Jha ; Sujit Dey |
| title_fullStr | High level power analysis and optimization by Anand Raghunathan ; Niraj K. Jha ; Sujit Dey |
| title_full_unstemmed | High level power analysis and optimization by Anand Raghunathan ; Niraj K. Jha ; Sujit Dey |
| title_short | High level power analysis and optimization |
| title_sort | high level power analysis and optimization |
| topic | Integrated circuits Very large scale integration Computer-aided design Low voltage integrated circuits Computer-aided design VLSI (DE-588)4117388-0 gnd Energieverbrauch (DE-588)4014733-2 gnd |
| topic_facet | Integrated circuits Very large scale integration Computer-aided design Low voltage integrated circuits Computer-aided design VLSI Energieverbrauch |
| work_keys_str_mv | AT raghunathananand highlevelpoweranalysisandoptimization AT jhanirajk highlevelpoweranalysisandoptimization AT deysujit highlevelpoweranalysisandoptimization |