Hardware description languages and their applications: specification, modelling, verification and synthesis of microelectronic systems
Gespeichert in:
| Format: | Tagungsbericht Buch |
|---|---|
| Sprache: | Undetermined |
| Veröffentlicht: |
London [u.a.]
Chapman & Hall
1997
|
| Ausgabe: | 1. ed. |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | X, 350 S. graph. Darst. |
| ISBN: | 0412788101 |
Internformat
MARC
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| 245 | 1 | 0 | |a Hardware description languages and their applications |b specification, modelling, verification and synthesis of microelectronic systems |c IFIP TC10 WG10.5 International Conference on Computer Hardware Description Languages and their Applications, 20 - 25 April 1997, Toledo, Spain. Ed. by Carlos Delgado Kloos ... |
| 250 | |a 1. ed. | ||
| 264 | 1 | |a London [u.a.] |b Chapman & Hall |c 1997 | |
| 300 | |a X, 350 S. |b graph. Darst. | ||
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Datensatz im Suchindex
| _version_ | 1820882529900560384 |
|---|---|
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CONTENTS
Preface vii
PART ONE Specification and Design of Reactive Systems
]
1
Synchronous languages for hardware and software reactive systems
G. Berry
3
2
Towards a complete design method for embedded systems using
Predicate/Transition-Nets
B.
Kleinjohann,
J.
Tacken
and
C. Tahedl
4
PART TWO Verification Using Model Checking Techniques
(+
Poster Abstracts)
25
3
Simplifying data operations for formal verification
F. Balarin and K, Sajid
27
4
CTL and equivalent sublanguages of CTL
K. Schneider
40
5
Verifying linear temporal properties of data intensive controllers using
finite instantiations
R. Hojati, D. Dill and R.K. Brayton
60
6
A high-level language for programming complex temporal behaviors
and its translation into synchronous circuits (poster abstract)
C.
-T. Chou,
J.-L.
Huang and
M. Fujita
74
7
System-level hardware design with
μ
-charts
(poster abstract)
J.
Philipps
and P.
Scholz 11
8
Interface synthesis in embedded hardware-software systems (poster abstract)
M. Auguin,
С
Belleudy and
G. Gogniat
80
9
TripleS-a formal validation environment for functional specifications
(poster abstract)
J. -P. Soininen, J. Saarikettu, V. Veijalainen and T. Huttunen
83
10
SOFH1A: a CAD environment to design digital control systems (poster abstract)
RJ. Machado,
J.M.
Fernandes
andA.J.
Proença
86
11
Compiling the language BALSA to delay insensitive hardware (poster abstract)
A. Bardsley andD. Edwards
89
12
High-level synthesis of structured data paths (poster abstract)
C.
Mandal
and R.M.
Zimmer 92
PART THREE Formal Characterizations of Systems
95
13
Characterizing a portable subset of behavioural VHDL-93
K. Thirunarayan and R. Ewing
97
Contents
14 Algebra
of communicating timing charts for describing and verifying
hardware interfaces
B. Berkane, S. Gandrabur and E. Cerny
114
15
A formal proof of absence of deadlock for any acyclic network of PCI buses
F. Corella, R. Shaw and
С
Zhang
134
PART FOUR Analog Languages
157
16
Behavioural modelling of sampled-data with HDL-A and ABSynth
V.
Moser,
H.
-P. Amann and
F. Pellandini 159
PART FIVE Languages in Design Flows
179
17
Hardware description languages in practical design flows
R. Camposano
181
18
VHDL generation from SDL specification
J.-M. Daveau, G.
Fernandes
Marchiom
and
A.A.
Jerraya
182
19
Exploiting isomorphism for speeding up instance-binding in an integrated
scheduling allocation and assignment approach to architectural synthesis
B.
Landwehr,
P. Marwedel, I. Markhofand R.
Dömer
202
PART SIX Future Trends in Hardware Design
213
20
Verification of large systems in silicon (special talk)
С
Ussery and S. Curry
215
21
The Shall Design test Development model for hardware systems
M. Heuchling, W.
Ecker
and
M. Mrva
240
22
Modular operational semantic specification of transport triggered architectures
J. Mountjoy, P. Hartel and H. Corporaal
260
PART SEVEN Formal Methods for Asynchronous and Distributed Systems
281
23
The world of I/O: a rich application area for formal methods (invited talk)
F. Corella
283
24
Abstract modelling of asynchronous
micropipeline
systems using Rainbow
H.
Barrínger, D.
Fellows,
G. Gough
and A. Williams
285
25
A new partial order reduction algorithm for concurrent system
verification (short talk)
R. Nalumasu and G. Gopalakrishnan
305
PART EIGHT VHDL
315
26
VHDL power simulator: power analysis at gate level
L
Kruse,
D.
Rabe and
W.
Nebel 317
27
Object oriented extensions to VHDL. the LaMI proposal
J. Benzakki and B. Djafri
334
Index of contributors
348
Keyword index
349 |
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| indexdate | 2025-01-10T17:08:20Z |
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| spelling | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems IFIP TC10 WG10.5 International Conference on Computer Hardware Description Languages and their Applications, 20 - 25 April 1997, Toledo, Spain. Ed. by Carlos Delgado Kloos ... 1. ed. London [u.a.] Chapman & Hall 1997 X, 350 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Hardwarebeschreibungssprache (DE-588)4159102-1 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1997 Toledo gnd-content Hardwarebeschreibungssprache (DE-588)4159102-1 s DE-604 Delgado Kloos, Carlos Sonstige (DE-588)1028939744 oth International Conference on Computer Hardware Description Languages and Their Applications 1997 Toledo Sonstige (DE-588)5263279-9 oth Digitalisierung TU Muenchen application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=008004626&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems Hardwarebeschreibungssprache (DE-588)4159102-1 gnd |
| subject_GND | (DE-588)4159102-1 (DE-588)1071861417 |
| title | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems |
| title_auth | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems |
| title_exact_search | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems |
| title_full | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems IFIP TC10 WG10.5 International Conference on Computer Hardware Description Languages and their Applications, 20 - 25 April 1997, Toledo, Spain. Ed. by Carlos Delgado Kloos ... |
| title_fullStr | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems IFIP TC10 WG10.5 International Conference on Computer Hardware Description Languages and their Applications, 20 - 25 April 1997, Toledo, Spain. Ed. by Carlos Delgado Kloos ... |
| title_full_unstemmed | Hardware description languages and their applications specification, modelling, verification and synthesis of microelectronic systems IFIP TC10 WG10.5 International Conference on Computer Hardware Description Languages and their Applications, 20 - 25 April 1997, Toledo, Spain. Ed. by Carlos Delgado Kloos ... |
| title_short | Hardware description languages and their applications |
| title_sort | hardware description languages and their applications specification modelling verification and synthesis of microelectronic systems |
| title_sub | specification, modelling, verification and synthesis of microelectronic systems |
| topic | Hardwarebeschreibungssprache (DE-588)4159102-1 gnd |
| topic_facet | Hardwarebeschreibungssprache Konferenzschrift 1997 Toledo |
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