PIM architecture and implementation:
Abstract: "In the Japanese Fifth Generation Computer Systems (FGCS) project, parallel inference machine (PIM) systems are being developed. Multi-PSI system has already been developed as an experimental hardware systems to provide a practical tool for parallel software research. Several PIMs are...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Tokyo, Japan
1991
|
| Series: | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report
659 |
| Subjects: | |
| Summary: | Abstract: "In the Japanese Fifth Generation Computer Systems (FGCS) project, parallel inference machine (PIM) systems are being developed. Multi-PSI system has already been developed as an experimental hardware systems to provide a practical tool for parallel software research. Several PIMs are now under development as prototype hardware systems of Fifth Generation Computer System. This paper describes a brief summary of (1) the architecture of Multi-PSI and PIM, and (2) KL1 language implementation on these hardwares." |
| Physical Description: | 9 S. |
Staff View
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| 520 | 3 | |a Abstract: "In the Japanese Fifth Generation Computer Systems (FGCS) project, parallel inference machine (PIM) systems are being developed. Multi-PSI system has already been developed as an experimental hardware systems to provide a practical tool for parallel software research. Several PIMs are now under development as prototype hardware systems of Fifth Generation Computer System. This paper describes a brief summary of (1) the architecture of Multi-PSI and PIM, and (2) KL1 language implementation on these hardwares." | |
| 650 | 4 | |a Fifth generation computers | |
| 650 | 4 | |a Parallel processing (Electronic computers) | |
| 700 | 1 | |a Hirata, Keiji |e Verfasser |4 aut | |
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Record in the Search Index
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| author | Imai, Akira Hirata, Keiji Taki, Kazuo |
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| id | DE-604.BV010954366 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T18:01:36Z |
| institution | BVB |
| language | English |
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| oclc_num | 26293308 |
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| physical | 9 S. |
| publishDate | 1991 |
| publishDateSearch | 1991 |
| publishDateSort | 1991 |
| record_format | marc |
| series | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
| series2 | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
| spelling | Imai, Akira Verfasser aut PIM architecture and implementation by A. Imai, K. Hirata & K. Taki Tokyo, Japan 1991 9 S. txt rdacontent n rdamedia nc rdacarrier Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 659 Abstract: "In the Japanese Fifth Generation Computer Systems (FGCS) project, parallel inference machine (PIM) systems are being developed. Multi-PSI system has already been developed as an experimental hardware systems to provide a practical tool for parallel software research. Several PIMs are now under development as prototype hardware systems of Fifth Generation Computer System. This paper describes a brief summary of (1) the architecture of Multi-PSI and PIM, and (2) KL1 language implementation on these hardwares." Fifth generation computers Parallel processing (Electronic computers) Hirata, Keiji Verfasser aut Taki, Kazuo Verfasser aut Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 659 (DE-604)BV010923438 659 |
| spellingShingle | Imai, Akira Hirata, Keiji Taki, Kazuo PIM architecture and implementation Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report Fifth generation computers Parallel processing (Electronic computers) |
| title | PIM architecture and implementation |
| title_auth | PIM architecture and implementation |
| title_exact_search | PIM architecture and implementation |
| title_full | PIM architecture and implementation by A. Imai, K. Hirata & K. Taki |
| title_fullStr | PIM architecture and implementation by A. Imai, K. Hirata & K. Taki |
| title_full_unstemmed | PIM architecture and implementation by A. Imai, K. Hirata & K. Taki |
| title_short | PIM architecture and implementation |
| title_sort | pim architecture and implementation |
| topic | Fifth generation computers Parallel processing (Electronic computers) |
| topic_facet | Fifth generation computers Parallel processing (Electronic computers) |
| volume_link | (DE-604)BV010923438 |
| work_keys_str_mv | AT imaiakira pimarchitectureandimplementation AT hiratakeiji pimarchitectureandimplementation AT takikazuo pimarchitectureandimplementation |