Research and development of the parallel inference machine in the FGCS project:
Abstract: "As part of the FGCS project, we are developing parallel inference machine (PIM) systems based on a logic programming framework. The research and development of PIM includes the PIM hardware architectures and the parallel implementation of KL1. KL1 has been designed as the PIM kernel...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Tokyo, Japan
1989
|
Schriftenreihe: | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report
473 |
Schlagworte: | |
Zusammenfassung: | Abstract: "As part of the FGCS project, we are developing parallel inference machine (PIM) systems based on a logic programming framework. The research and development of PIM includes the PIM hardware architectures and the parallel implementation of KL1. KL1 has been designed as the PIM kernel language, so that both PIM applications and the parallel operating system (PIMOS) can be written in KL1. The characteristics of KL1 are used to solve KL1 parallel implementation problems, such as distributed resource management, goal scheduling and distribution, memory management, and distributed unification. They have been condensed into the abstract machine instruction set, KL1-B In designing the hardware architecture of the PIM pilot machine, a hierarchical configuration has been introduced to connect more than 100 processing elements. A new instruction architecture for KL1 is provided for the processing elements. A coherent cache protocol has been designed to make high-performance clusters, each of which includes eight processing elements connected with shared memory. These clusters will be connected by a multiple hyper-cube network. |
Beschreibung: | 23 S. |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV010947584 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | t | ||
008 | 960912s1989 |||| 00||| engod | ||
035 | |a (OCoLC)23004592 | ||
035 | |a (DE-599)BVBBV010947584 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-91G | ||
100 | 1 | |a Goto, Atsuhiro |e Verfasser |4 aut | |
245 | 1 | 0 | |a Research and development of the parallel inference machine in the FGCS project |c by A. [oto |
264 | 1 | |a Tokyo, Japan |c 1989 | |
300 | |a 23 S. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 473 | |
520 | 3 | |a Abstract: "As part of the FGCS project, we are developing parallel inference machine (PIM) systems based on a logic programming framework. The research and development of PIM includes the PIM hardware architectures and the parallel implementation of KL1. KL1 has been designed as the PIM kernel language, so that both PIM applications and the parallel operating system (PIMOS) can be written in KL1. The characteristics of KL1 are used to solve KL1 parallel implementation problems, such as distributed resource management, goal scheduling and distribution, memory management, and distributed unification. They have been condensed into the abstract machine instruction set, KL1-B | |
520 | 3 | |a In designing the hardware architecture of the PIM pilot machine, a hierarchical configuration has been introduced to connect more than 100 processing elements. A new instruction architecture for KL1 is provided for the processing elements. A coherent cache protocol has been designed to make high-performance clusters, each of which includes eight processing elements connected with shared memory. These clusters will be connected by a multiple hyper-cube network. | |
650 | 4 | |a Fifth generation computers |z Japan | |
650 | 4 | |a Inference | |
650 | 4 | |a Logic programming | |
830 | 0 | |a Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |v 473 |w (DE-604)BV010923438 |9 473 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-007321751 |
Datensatz im Suchindex
_version_ | 1804125434267303936 |
---|---|
any_adam_object | |
author | Goto, Atsuhiro |
author_facet | Goto, Atsuhiro |
author_role | aut |
author_sort | Goto, Atsuhiro |
author_variant | a g ag |
building | Verbundindex |
bvnumber | BV010947584 |
ctrlnum | (OCoLC)23004592 (DE-599)BVBBV010947584 |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02179nam a2200325 cb4500</leader><controlfield tag="001">BV010947584</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">960912s1989 |||| 00||| engod</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)23004592</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010947584</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Goto, Atsuhiro</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Research and development of the parallel inference machine in the FGCS project</subfield><subfield code="c">by A. [oto</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Tokyo, Japan</subfield><subfield code="c">1989</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">23 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report</subfield><subfield code="v">473</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "As part of the FGCS project, we are developing parallel inference machine (PIM) systems based on a logic programming framework. The research and development of PIM includes the PIM hardware architectures and the parallel implementation of KL1. KL1 has been designed as the PIM kernel language, so that both PIM applications and the parallel operating system (PIMOS) can be written in KL1. The characteristics of KL1 are used to solve KL1 parallel implementation problems, such as distributed resource management, goal scheduling and distribution, memory management, and distributed unification. They have been condensed into the abstract machine instruction set, KL1-B</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">In designing the hardware architecture of the PIM pilot machine, a hierarchical configuration has been introduced to connect more than 100 processing elements. A new instruction architecture for KL1 is provided for the processing elements. A coherent cache protocol has been designed to make high-performance clusters, each of which includes eight processing elements connected with shared memory. These clusters will be connected by a multiple hyper-cube network.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Fifth generation computers</subfield><subfield code="z">Japan</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Inference</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic programming</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report</subfield><subfield code="v">473</subfield><subfield code="w">(DE-604)BV010923438</subfield><subfield code="9">473</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007321751</subfield></datafield></record></collection> |
id | DE-604.BV010947584 |
illustrated | Not Illustrated |
indexdate | 2024-07-09T18:01:30Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007321751 |
oclc_num | 23004592 |
open_access_boolean | |
owner | DE-91G DE-BY-TUM |
owner_facet | DE-91G DE-BY-TUM |
physical | 23 S. |
publishDate | 1989 |
publishDateSearch | 1989 |
publishDateSort | 1989 |
record_format | marc |
series | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
series2 | Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report |
spelling | Goto, Atsuhiro Verfasser aut Research and development of the parallel inference machine in the FGCS project by A. [oto Tokyo, Japan 1989 23 S. txt rdacontent n rdamedia nc rdacarrier Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 473 Abstract: "As part of the FGCS project, we are developing parallel inference machine (PIM) systems based on a logic programming framework. The research and development of PIM includes the PIM hardware architectures and the parallel implementation of KL1. KL1 has been designed as the PIM kernel language, so that both PIM applications and the parallel operating system (PIMOS) can be written in KL1. The characteristics of KL1 are used to solve KL1 parallel implementation problems, such as distributed resource management, goal scheduling and distribution, memory management, and distributed unification. They have been condensed into the abstract machine instruction set, KL1-B In designing the hardware architecture of the PIM pilot machine, a hierarchical configuration has been introduced to connect more than 100 processing elements. A new instruction architecture for KL1 is provided for the processing elements. A coherent cache protocol has been designed to make high-performance clusters, each of which includes eight processing elements connected with shared memory. These clusters will be connected by a multiple hyper-cube network. Fifth generation computers Japan Inference Logic programming Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report 473 (DE-604)BV010923438 473 |
spellingShingle | Goto, Atsuhiro Research and development of the parallel inference machine in the FGCS project Shin-Sedai-Konpyūta-Gijutsu-Kaihatsu-Kikō <Tōkyō>: ICOT technical report Fifth generation computers Japan Inference Logic programming |
title | Research and development of the parallel inference machine in the FGCS project |
title_auth | Research and development of the parallel inference machine in the FGCS project |
title_exact_search | Research and development of the parallel inference machine in the FGCS project |
title_full | Research and development of the parallel inference machine in the FGCS project by A. [oto |
title_fullStr | Research and development of the parallel inference machine in the FGCS project by A. [oto |
title_full_unstemmed | Research and development of the parallel inference machine in the FGCS project by A. [oto |
title_short | Research and development of the parallel inference machine in the FGCS project |
title_sort | research and development of the parallel inference machine in the fgcs project |
topic | Fifth generation computers Japan Inference Logic programming |
topic_facet | Fifth generation computers Japan Inference Logic programming |
volume_link | (DE-604)BV010923438 |
work_keys_str_mv | AT gotoatsuhiro researchanddevelopmentoftheparallelinferencemachineinthefgcsproject |