Clock distribution networks in VLSI circuits and systems:
Gespeichert in:
Format: | Buch |
---|---|
Sprache: | English |
Veröffentlicht: |
Piscataway, NJ
IEE Press
1995
|
Schlagworte: | |
Beschreibung: | XI, 525 S. Ill., graph. Darst. |
ISBN: | 0780310586 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV010821186 | ||
003 | DE-604 | ||
005 | 19960808 | ||
007 | t | ||
008 | 960627s1995 ad|| |||| 00||| engod | ||
020 | |a 0780310586 |9 0-7803-1058-6 | ||
035 | |a (OCoLC)32311416 | ||
035 | |a (DE-599)BVBBV010821186 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-91 |a DE-83 | ||
050 | 0 | |a TK7874.75 | |
082 | 0 | |a 621.39/5 |2 20 | |
084 | |a ELT 364f |2 stub | ||
245 | 1 | 0 | |a Clock distribution networks in VLSI circuits and systems |c ed. by Eby G. Friedman |
264 | 1 | |a Piscataway, NJ |b IEE Press |c 1995 | |
300 | |a XI, 525 S. |b Ill., graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
650 | 4 | |a Timing circuits |x Design and construction | |
700 | 1 | |a Friedman, Eby G. |e Sonstige |4 oth | |
999 | |a oai:aleph.bib-bvb.de:BVB01-007231765 |
Datensatz im Suchindex
_version_ | 1804125306960740352 |
---|---|
any_adam_object | |
building | Verbundindex |
bvnumber | BV010821186 |
callnumber-first | T - Technology |
callnumber-label | TK7874 |
callnumber-raw | TK7874.75 |
callnumber-search | TK7874.75 |
callnumber-sort | TK 47874.75 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_tum | ELT 364f |
ctrlnum | (OCoLC)32311416 (DE-599)BVBBV010821186 |
dewey-full | 621.39/5 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.39/5 |
dewey-search | 621.39/5 |
dewey-sort | 3621.39 15 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00982nam a2200313 c 4500</leader><controlfield tag="001">BV010821186</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19960808 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">960627s1995 ad|| |||| 00||| engod</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0780310586</subfield><subfield code="9">0-7803-1058-6</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)32311416</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010821186</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield><subfield code="a">DE-83</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874.75</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.39/5</subfield><subfield code="2">20</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 364f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Clock distribution networks in VLSI circuits and systems</subfield><subfield code="c">ed. by Eby G. Friedman</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Piscataway, NJ</subfield><subfield code="b">IEE Press</subfield><subfield code="c">1995</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XI, 525 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Timing circuits</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Friedman, Eby G.</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007231765</subfield></datafield></record></collection> |
id | DE-604.BV010821186 |
illustrated | Illustrated |
indexdate | 2024-07-09T17:59:28Z |
institution | BVB |
isbn | 0780310586 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007231765 |
oclc_num | 32311416 |
open_access_boolean | |
owner | DE-91 DE-BY-TUM DE-83 |
owner_facet | DE-91 DE-BY-TUM DE-83 |
physical | XI, 525 S. Ill., graph. Darst. |
publishDate | 1995 |
publishDateSearch | 1995 |
publishDateSort | 1995 |
publisher | IEE Press |
record_format | marc |
spelling | Clock distribution networks in VLSI circuits and systems ed. by Eby G. Friedman Piscataway, NJ IEE Press 1995 XI, 525 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Integrated circuits Very large scale integration Design and construction Timing circuits Design and construction Friedman, Eby G. Sonstige oth |
spellingShingle | Clock distribution networks in VLSI circuits and systems Integrated circuits Very large scale integration Design and construction Timing circuits Design and construction |
title | Clock distribution networks in VLSI circuits and systems |
title_auth | Clock distribution networks in VLSI circuits and systems |
title_exact_search | Clock distribution networks in VLSI circuits and systems |
title_full | Clock distribution networks in VLSI circuits and systems ed. by Eby G. Friedman |
title_fullStr | Clock distribution networks in VLSI circuits and systems ed. by Eby G. Friedman |
title_full_unstemmed | Clock distribution networks in VLSI circuits and systems ed. by Eby G. Friedman |
title_short | Clock distribution networks in VLSI circuits and systems |
title_sort | clock distribution networks in vlsi circuits and systems |
topic | Integrated circuits Very large scale integration Design and construction Timing circuits Design and construction |
topic_facet | Integrated circuits Very large scale integration Design and construction Timing circuits Design and construction |
work_keys_str_mv | AT friedmanebyg clockdistributionnetworksinvlsicircuitsandsystems |