Ternary simulation: a refinement of binary functions or an abstraction of real-time behaviour?
Abstract: "We prove the equivalence between the ternary circuit model and a notion of intuitionistic stabilization bounds. The results are obtained as an application of the timing interpretation of intuitionistic propositional logic presented in [12]. We show that if one takes an intensional vi...
Gespeichert in:
Hauptverfasser: | , |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Passau
1996
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Schriftenreihe: | Universität <Passau> / Fakultät für Mathematik und Informatik: MIP
1996,05 |
Schlagworte: | |
Zusammenfassung: | Abstract: "We prove the equivalence between the ternary circuit model and a notion of intuitionistic stabilization bounds. The results are obtained as an application of the timing interpretation of intuitionistic propositional logic presented in [12]. We show that if one takes an intensional view of the ternary model then the delays that have been abstracted away can be completely recovered. Our intensional soundness and completeness theorems imply that the extracted delays are both correct and exact; thus we have developed a framework which unifies ternary simulation and functional timing analysis. Our focus is on the combinational behaviour of gate-level circuits with feedback." |
Beschreibung: | 27, 4 S. Ill., graph. Darst. |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV010703353 | ||
003 | DE-604 | ||
007 | t| | ||
008 | 960410s1996 xx ad|| |||| 00||| eng d | ||
035 | |a (OCoLC)36067073 | ||
035 | |a (DE-599)BVBBV010703353 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-154 |a DE-739 |a DE-12 |a DE-91G |a DE-384 |a DE-634 | ||
100 | 1 | |a Mendler, Michael V. |e Verfasser |4 aut | |
245 | 1 | 0 | |a Ternary simulation |b a refinement of binary functions or an abstraction of real-time behaviour? |c Michael Mendler ; Matt Fairtlough |
264 | 1 | |a Passau |c 1996 | |
300 | |a 27, 4 S. |b Ill., graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a Universität <Passau> / Fakultät für Mathematik und Informatik: MIP |v 1996,05 | |
520 | 3 | |a Abstract: "We prove the equivalence between the ternary circuit model and a notion of intuitionistic stabilization bounds. The results are obtained as an application of the timing interpretation of intuitionistic propositional logic presented in [12]. We show that if one takes an intensional view of the ternary model then the delays that have been abstracted away can be completely recovered. Our intensional soundness and completeness theorems imply that the extracted delays are both correct and exact; thus we have developed a framework which unifies ternary simulation and functional timing analysis. Our focus is on the combinational behaviour of gate-level circuits with feedback." | |
650 | 4 | |a Gate array circuits |x Design and construction | |
650 | 4 | |a Logic programming | |
650 | 0 | 7 | |a Theoretische Informatik |0 (DE-588)4196735-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Informatik |0 (DE-588)4026894-9 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Mathematik |0 (DE-588)4037944-9 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Theoretische Informatik |0 (DE-588)4196735-5 |D s |
689 | 0 | 1 | |a Informatik |0 (DE-588)4026894-9 |D s |
689 | 0 | 2 | |a Mathematik |0 (DE-588)4037944-9 |D s |
689 | 0 | |5 DE-604 | |
700 | 1 | |a Fairtlough, Matthew V. |e Verfasser |4 aut | |
810 | 2 | |a Fakultät für Mathematik und Informatik: MIP |t Universität <Passau> |v 1996,05 |w (DE-604)BV000905393 |9 1996,05 | |
943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-007144651 |
Datensatz im Suchindex
_version_ | 1820882317214744576 |
---|---|
adam_text | |
any_adam_object | |
author | Mendler, Michael V. Fairtlough, Matthew V. |
author_facet | Mendler, Michael V. Fairtlough, Matthew V. |
author_role | aut aut |
author_sort | Mendler, Michael V. |
author_variant | m v m mv mvm m v f mv mvf |
building | Verbundindex |
bvnumber | BV010703353 |
classification_rvk | SS 5600 |
ctrlnum | (OCoLC)36067073 (DE-599)BVBBV010703353 |
discipline | Informatik |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000 cb4500</leader><controlfield tag="001">BV010703353</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="007">t|</controlfield><controlfield tag="008">960410s1996 xx ad|| |||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)36067073</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010703353</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-154</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-12</subfield><subfield code="a">DE-91G</subfield><subfield code="a">DE-384</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Mendler, Michael V.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Ternary simulation</subfield><subfield code="b">a refinement of binary functions or an abstraction of real-time behaviour?</subfield><subfield code="c">Michael Mendler ; Matt Fairtlough</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Passau</subfield><subfield code="c">1996</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">27, 4 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Universität <Passau> / Fakultät für Mathematik und Informatik: MIP</subfield><subfield code="v">1996,05</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "We prove the equivalence between the ternary circuit model and a notion of intuitionistic stabilization bounds. The results are obtained as an application of the timing interpretation of intuitionistic propositional logic presented in [12]. We show that if one takes an intensional view of the ternary model then the delays that have been abstracted away can be completely recovered. Our intensional soundness and completeness theorems imply that the extracted delays are both correct and exact; thus we have developed a framework which unifies ternary simulation and functional timing analysis. Our focus is on the combinational behaviour of gate-level circuits with feedback."</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Gate array circuits</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic programming</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Theoretische Informatik</subfield><subfield code="0">(DE-588)4196735-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Informatik</subfield><subfield code="0">(DE-588)4026894-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Mathematik</subfield><subfield code="0">(DE-588)4037944-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Theoretische Informatik</subfield><subfield code="0">(DE-588)4196735-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Informatik</subfield><subfield code="0">(DE-588)4026894-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Mathematik</subfield><subfield code="0">(DE-588)4037944-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Fairtlough, Matthew V.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="810" ind1="2" ind2=" "><subfield code="a">Fakultät für Mathematik und Informatik: MIP</subfield><subfield code="t">Universität <Passau></subfield><subfield code="v">1996,05</subfield><subfield code="w">(DE-604)BV000905393</subfield><subfield code="9">1996,05</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-007144651</subfield></datafield></record></collection> |
id | DE-604.BV010703353 |
illustrated | Illustrated |
indexdate | 2025-01-10T17:04:59Z |
institution | BVB |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-007144651 |
oclc_num | 36067073 |
open_access_boolean | |
owner | DE-154 DE-739 DE-12 DE-91G DE-BY-TUM DE-384 DE-634 |
owner_facet | DE-154 DE-739 DE-12 DE-91G DE-BY-TUM DE-384 DE-634 |
physical | 27, 4 S. Ill., graph. Darst. |
publishDate | 1996 |
publishDateSearch | 1996 |
publishDateSort | 1996 |
record_format | marc |
series2 | Universität <Passau> / Fakultät für Mathematik und Informatik: MIP |
spelling | Mendler, Michael V. Verfasser aut Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? Michael Mendler ; Matt Fairtlough Passau 1996 27, 4 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Universität <Passau> / Fakultät für Mathematik und Informatik: MIP 1996,05 Abstract: "We prove the equivalence between the ternary circuit model and a notion of intuitionistic stabilization bounds. The results are obtained as an application of the timing interpretation of intuitionistic propositional logic presented in [12]. We show that if one takes an intensional view of the ternary model then the delays that have been abstracted away can be completely recovered. Our intensional soundness and completeness theorems imply that the extracted delays are both correct and exact; thus we have developed a framework which unifies ternary simulation and functional timing analysis. Our focus is on the combinational behaviour of gate-level circuits with feedback." Gate array circuits Design and construction Logic programming Theoretische Informatik (DE-588)4196735-5 gnd rswk-swf Informatik (DE-588)4026894-9 gnd rswk-swf Mathematik (DE-588)4037944-9 gnd rswk-swf Theoretische Informatik (DE-588)4196735-5 s Informatik (DE-588)4026894-9 s Mathematik (DE-588)4037944-9 s DE-604 Fairtlough, Matthew V. Verfasser aut Fakultät für Mathematik und Informatik: MIP Universität <Passau> 1996,05 (DE-604)BV000905393 1996,05 |
spellingShingle | Mendler, Michael V. Fairtlough, Matthew V. Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? Gate array circuits Design and construction Logic programming Theoretische Informatik (DE-588)4196735-5 gnd Informatik (DE-588)4026894-9 gnd Mathematik (DE-588)4037944-9 gnd |
subject_GND | (DE-588)4196735-5 (DE-588)4026894-9 (DE-588)4037944-9 |
title | Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? |
title_auth | Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? |
title_exact_search | Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? |
title_full | Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? Michael Mendler ; Matt Fairtlough |
title_fullStr | Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? Michael Mendler ; Matt Fairtlough |
title_full_unstemmed | Ternary simulation a refinement of binary functions or an abstraction of real-time behaviour? Michael Mendler ; Matt Fairtlough |
title_short | Ternary simulation |
title_sort | ternary simulation a refinement of binary functions or an abstraction of real time behaviour |
title_sub | a refinement of binary functions or an abstraction of real-time behaviour? |
topic | Gate array circuits Design and construction Logic programming Theoretische Informatik (DE-588)4196735-5 gnd Informatik (DE-588)4026894-9 gnd Mathematik (DE-588)4037944-9 gnd |
topic_facet | Gate array circuits Design and construction Logic programming Theoretische Informatik Informatik Mathematik |
volume_link | (DE-604)BV000905393 |
work_keys_str_mv | AT mendlermichaelv ternarysimulationarefinementofbinaryfunctionsoranabstractionofrealtimebehaviour AT fairtloughmatthewv ternarysimulationarefinementofbinaryfunctionsoranabstractionofrealtimebehaviour |