A mechanised definition of Silage in Hol:
Abstract: "If formal methods of hardware verification are to have any impact on the practices of working engineers, connections must be made between the languages used in practice to design circuits, and those used for research into hardware verification. SILAGE is a simple dataflow language ma...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Cambridge
1993
|
| Schriftenreihe: | Computer Laboratory <Cambridge>: Technical report
287 |
| Schlagworte: | |
| Zusammenfassung: | Abstract: "If formal methods of hardware verification are to have any impact on the practices of working engineers, connections must be made between the languages used in practice to design circuits, and those used for research into hardware verification. SILAGE is a simple dataflow language marketed for specifying digital signal processing circuits. Higher Order Logic (HOL) is extensively used for research into hardware verification. This paper presents a formal definition of a substantial subset of SILAGE, by mapping SILAGE declarations into HOL predicates. The definition has been mechanised in the HOL theorem prover to support the transformational design of SILAGE circuits as theorem proving in HOL." |
| Beschreibung: | 28 S. |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV010412183 | ||
| 003 | DE-604 | ||
| 005 | 19951009 | ||
| 007 | t | ||
| 008 | 951009s1993 |||| 00||| engod | ||
| 035 | |a (OCoLC)28691507 | ||
| 035 | |a (DE-599)BVBBV010412183 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 100 | 1 | |a Gordon, Andrew D. |d 1964- |e Verfasser |0 (DE-588)133694844 |4 aut | |
| 245 | 1 | 0 | |a A mechanised definition of Silage in Hol |
| 264 | 1 | |a Cambridge |c 1993 | |
| 300 | |a 28 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a Computer Laboratory <Cambridge>: Technical report |v 287 | |
| 520 | 3 | |a Abstract: "If formal methods of hardware verification are to have any impact on the practices of working engineers, connections must be made between the languages used in practice to design circuits, and those used for research into hardware verification. SILAGE is a simple dataflow language marketed for specifying digital signal processing circuits. Higher Order Logic (HOL) is extensively used for research into hardware verification. This paper presents a formal definition of a substantial subset of SILAGE, by mapping SILAGE declarations into HOL predicates. The definition has been mechanised in the HOL theorem prover to support the transformational design of SILAGE circuits as theorem proving in HOL." | |
| 650 | 7 | |a Computer software |2 sigle | |
| 650 | 7 | |a Electromechanical and electronic devices |2 sigle | |
| 650 | 4 | |a Signal processing | |
| 830 | 0 | |a Computer Laboratory <Cambridge>: Technical report |v 287 |w (DE-604)BV004055605 |9 287 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-006934047 | ||
Datensatz im Suchindex
| _version_ | 1804124840703033344 |
|---|---|
| any_adam_object | |
| author | Gordon, Andrew D. 1964- |
| author_GND | (DE-588)133694844 |
| author_facet | Gordon, Andrew D. 1964- |
| author_role | aut |
| author_sort | Gordon, Andrew D. 1964- |
| author_variant | a d g ad adg |
| building | Verbundindex |
| bvnumber | BV010412183 |
| ctrlnum | (OCoLC)28691507 (DE-599)BVBBV010412183 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01663nam a2200301 cb4500</leader><controlfield tag="001">BV010412183</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19951009 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">951009s1993 |||| 00||| engod</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)28691507</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV010412183</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Gordon, Andrew D.</subfield><subfield code="d">1964-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)133694844</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">A mechanised definition of Silage in Hol</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Cambridge</subfield><subfield code="c">1993</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">28 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Computer Laboratory <Cambridge>: Technical report</subfield><subfield code="v">287</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "If formal methods of hardware verification are to have any impact on the practices of working engineers, connections must be made between the languages used in practice to design circuits, and those used for research into hardware verification. SILAGE is a simple dataflow language marketed for specifying digital signal processing circuits. Higher Order Logic (HOL) is extensively used for research into hardware verification. This paper presents a formal definition of a substantial subset of SILAGE, by mapping SILAGE declarations into HOL predicates. The definition has been mechanised in the HOL theorem prover to support the transformational design of SILAGE circuits as theorem proving in HOL."</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Computer software</subfield><subfield code="2">sigle</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Electromechanical and electronic devices</subfield><subfield code="2">sigle</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Signal processing</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Computer Laboratory <Cambridge>: Technical report</subfield><subfield code="v">287</subfield><subfield code="w">(DE-604)BV004055605</subfield><subfield code="9">287</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-006934047</subfield></datafield></record></collection> |
| id | DE-604.BV010412183 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:52:04Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006934047 |
| oclc_num | 28691507 |
| open_access_boolean | |
| physical | 28 S. |
| publishDate | 1993 |
| publishDateSearch | 1993 |
| publishDateSort | 1993 |
| record_format | marc |
| series | Computer Laboratory <Cambridge>: Technical report |
| series2 | Computer Laboratory <Cambridge>: Technical report |
| spelling | Gordon, Andrew D. 1964- Verfasser (DE-588)133694844 aut A mechanised definition of Silage in Hol Cambridge 1993 28 S. txt rdacontent n rdamedia nc rdacarrier Computer Laboratory <Cambridge>: Technical report 287 Abstract: "If formal methods of hardware verification are to have any impact on the practices of working engineers, connections must be made between the languages used in practice to design circuits, and those used for research into hardware verification. SILAGE is a simple dataflow language marketed for specifying digital signal processing circuits. Higher Order Logic (HOL) is extensively used for research into hardware verification. This paper presents a formal definition of a substantial subset of SILAGE, by mapping SILAGE declarations into HOL predicates. The definition has been mechanised in the HOL theorem prover to support the transformational design of SILAGE circuits as theorem proving in HOL." Computer software sigle Electromechanical and electronic devices sigle Signal processing Computer Laboratory <Cambridge>: Technical report 287 (DE-604)BV004055605 287 |
| spellingShingle | Gordon, Andrew D. 1964- A mechanised definition of Silage in Hol Computer Laboratory <Cambridge>: Technical report Computer software sigle Electromechanical and electronic devices sigle Signal processing |
| title | A mechanised definition of Silage in Hol |
| title_auth | A mechanised definition of Silage in Hol |
| title_exact_search | A mechanised definition of Silage in Hol |
| title_full | A mechanised definition of Silage in Hol |
| title_fullStr | A mechanised definition of Silage in Hol |
| title_full_unstemmed | A mechanised definition of Silage in Hol |
| title_short | A mechanised definition of Silage in Hol |
| title_sort | a mechanised definition of silage in hol |
| topic | Computer software sigle Electromechanical and electronic devices sigle Signal processing |
| topic_facet | Computer software Electromechanical and electronic devices Signal processing |
| volume_link | (DE-604)BV004055605 |
| work_keys_str_mv | AT gordonandrewd amechaniseddefinitionofsilageinhol |