Totally verified systems, linking verified software to verified hardware:
Abstract: "We describe exploratory efforts to design and verify a compiler for a formally verified microprocessor as one aspect of the eventual goal of building totally verified systems. Together with a formal proof of correctness for the microprocessor, this yields a precise and rigorously est...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Cambridge
1989
|
| Schriftenreihe: | Computer Laboratory <Cambridge>: Technical report
178 |
| Schlagworte: | |
| Zusammenfassung: | Abstract: "We describe exploratory efforts to design and verify a compiler for a formally verified microprocessor as one aspect of the eventual goal of building totally verified systems. Together with a formal proof of correctness for the microprocessor, this yields a precise and rigorously established link between the semantics of the source language and the execution of compiled code by the fabricated microchip. we describe, in particular: (1) how the limitations of real hardware influenced this proof; and (2) how the general framework provided by higher-order logic was used to formalize the compiler correctness problem for a hierarchially structured language." |
| Beschreibung: | 25 S. |
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| 520 | 3 | |a Abstract: "We describe exploratory efforts to design and verify a compiler for a formally verified microprocessor as one aspect of the eventual goal of building totally verified systems. Together with a formal proof of correctness for the microprocessor, this yields a precise and rigorously established link between the semantics of the source language and the execution of compiled code by the fabricated microchip. we describe, in particular: (1) how the limitations of real hardware influenced this proof; and (2) how the general framework provided by higher-order logic was used to formalize the compiler correctness problem for a hierarchially structured language." | |
| 650 | 7 | |a Computer hardware |2 sigle | |
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| 650 | 4 | |a Compilers (Computer programs) | |
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| author | Joyce, Jeffrey J. |
| author_facet | Joyce, Jeffrey J. |
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| id | DE-604.BV010410972 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:52:02Z |
| institution | BVB |
| language | English |
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| oclc_num | 20797916 |
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| physical | 25 S. |
| publishDate | 1989 |
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| series | Computer Laboratory <Cambridge>: Technical report |
| series2 | Computer Laboratory <Cambridge>: Technical report |
| spelling | Joyce, Jeffrey J. Verfasser aut Totally verified systems, linking verified software to verified hardware Cambridge 1989 25 S. txt rdacontent n rdamedia nc rdacarrier Computer Laboratory <Cambridge>: Technical report 178 Abstract: "We describe exploratory efforts to design and verify a compiler for a formally verified microprocessor as one aspect of the eventual goal of building totally verified systems. Together with a formal proof of correctness for the microprocessor, this yields a precise and rigorously established link between the semantics of the source language and the execution of compiled code by the fabricated microchip. we describe, in particular: (1) how the limitations of real hardware influenced this proof; and (2) how the general framework provided by higher-order logic was used to formalize the compiler correctness problem for a hierarchially structured language." Computer hardware sigle Computer software sigle Compilers (Computer programs) Computer programs Verification Computer Laboratory <Cambridge>: Technical report 178 (DE-604)BV004055605 178 |
| spellingShingle | Joyce, Jeffrey J. Totally verified systems, linking verified software to verified hardware Computer Laboratory <Cambridge>: Technical report Computer hardware sigle Computer software sigle Compilers (Computer programs) Computer programs Verification |
| title | Totally verified systems, linking verified software to verified hardware |
| title_auth | Totally verified systems, linking verified software to verified hardware |
| title_exact_search | Totally verified systems, linking verified software to verified hardware |
| title_full | Totally verified systems, linking verified software to verified hardware |
| title_fullStr | Totally verified systems, linking verified software to verified hardware |
| title_full_unstemmed | Totally verified systems, linking verified software to verified hardware |
| title_short | Totally verified systems, linking verified software to verified hardware |
| title_sort | totally verified systems linking verified software to verified hardware |
| topic | Computer hardware sigle Computer software sigle Compilers (Computer programs) Computer programs Verification |
| topic_facet | Computer hardware Computer software Compilers (Computer programs) Computer programs Verification |
| volume_link | (DE-604)BV004055605 |
| work_keys_str_mv | AT joycejeffreyj totallyverifiedsystemslinkingverifiedsoftwaretoverifiedhardware |