Logic synthesis:
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York u.a.
McGraw-Hill
1994
|
| Schriftenreihe: | McGraw-Hill series on computer engineering
|
| Schlagworte: | |
| Beschreibung: | XVII, 404 S. graph. Darst. |
| ISBN: | 0070165009 |
Internformat
MARC
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| 100 | 1 | |a Devadas, Srinivas |d 1963- |e Verfasser |0 (DE-588)121371107 |4 aut | |
| 245 | 1 | 0 | |a Logic synthesis |c Srinivas Devadas ; Abhijit Ghosh ; Kurt Keutzer |
| 264 | 1 | |a New York u.a. |b McGraw-Hill |c 1994 | |
| 300 | |a XVII, 404 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a McGraw-Hill series on computer engineering | |
| 650 | 4 | |a Datenverarbeitung | |
| 650 | 4 | |a Computer-aided design | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design |x Data processing | |
| 650 | 4 | |a Logic design |x Data processing | |
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Ghosh, Abhijit |e Verfasser |4 aut | |
| 700 | 1 | |a Keutzer, Kurt |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-006507225 | ||
Datensatz im Suchindex
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|---|---|
| any_adam_object | |
| author | Devadas, Srinivas 1963- Ghosh, Abhijit Keutzer, Kurt |
| author_GND | (DE-588)121371107 |
| author_facet | Devadas, Srinivas 1963- Ghosh, Abhijit Keutzer, Kurt |
| author_role | aut aut aut |
| author_sort | Devadas, Srinivas 1963- |
| author_variant | s d sd a g ag k k kk |
| building | Verbundindex |
| bvnumber | BV009829317 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 4950 ZN 4952 |
| classification_tum | ELT 273f |
| ctrlnum | (OCoLC)29314634 (DE-599)BVBBV009829317 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV009829317 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:41:37Z |
| institution | BVB |
| isbn | 0070165009 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006507225 |
| oclc_num | 29314634 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM DE-92 DE-1046 |
| owner_facet | DE-91 DE-BY-TUM DE-92 DE-1046 |
| physical | XVII, 404 S. graph. Darst. |
| publishDate | 1994 |
| publishDateSearch | 1994 |
| publishDateSort | 1994 |
| publisher | McGraw-Hill |
| record_format | marc |
| series2 | McGraw-Hill series on computer engineering |
| spelling | Devadas, Srinivas 1963- Verfasser (DE-588)121371107 aut Logic synthesis Srinivas Devadas ; Abhijit Ghosh ; Kurt Keutzer New York u.a. McGraw-Hill 1994 XVII, 404 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier McGraw-Hill series on computer engineering Datenverarbeitung Computer-aided design Integrated circuits Very large scale integration Design Data processing Logic design Data processing Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Logischer Entwurf (DE-588)4168051-0 s DE-604 Ghosh, Abhijit Verfasser aut Keutzer, Kurt Verfasser aut |
| spellingShingle | Devadas, Srinivas 1963- Ghosh, Abhijit Keutzer, Kurt Logic synthesis Datenverarbeitung Computer-aided design Integrated circuits Very large scale integration Design Data processing Logic design Data processing Logischer Entwurf (DE-588)4168051-0 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4168051-0 (DE-588)4117388-0 |
| title | Logic synthesis |
| title_auth | Logic synthesis |
| title_exact_search | Logic synthesis |
| title_full | Logic synthesis Srinivas Devadas ; Abhijit Ghosh ; Kurt Keutzer |
| title_fullStr | Logic synthesis Srinivas Devadas ; Abhijit Ghosh ; Kurt Keutzer |
| title_full_unstemmed | Logic synthesis Srinivas Devadas ; Abhijit Ghosh ; Kurt Keutzer |
| title_short | Logic synthesis |
| title_sort | logic synthesis |
| topic | Datenverarbeitung Computer-aided design Integrated circuits Very large scale integration Design Data processing Logic design Data processing Logischer Entwurf (DE-588)4168051-0 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Datenverarbeitung Computer-aided design Integrated circuits Very large scale integration Design Data processing Logic design Data processing Logischer Entwurf VLSI |
| work_keys_str_mv | AT devadassrinivas logicsynthesis AT ghoshabhijit logicsynthesis AT keutzerkurt logicsynthesis |