Design automation for timing driven layout synthesis:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston u.a.
Kluwer
1993
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
198 : VLSI, computer architecture and digital signal processing |
| Schlagworte: | |
| Beschreibung: | XX, 269 S. graph. Darst. |
| ISBN: | 0792392817 |
Internformat
MARC
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|---|---|---|---|
| 001 | BV009557511 | ||
| 003 | DE-604 | ||
| 005 | 19940427 | ||
| 007 | t | ||
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| 035 | |a (DE-599)BVBBV009557511 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91 |a DE-11 | ||
| 050 | 0 | |a TK7871.99.M44 | |
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| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 084 | |a ELT 272f |2 stub | ||
| 100 | 1 | |a Sapatnekar, Sachin S. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Design automation for timing driven layout synthesis |c by Sachin S. Sapatnekar ; Sung-Mo (Steve) Kang |
| 246 | 1 | 3 | |a Design automation for timing-driven layout synthesis |
| 264 | 1 | |a Boston u.a. |b Kluwer |c 1993 | |
| 300 | |a XX, 269 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 198 : VLSI, computer architecture and digital signal processing | |
| 650 | 4 | |a Integrated circuit layout |x Computer-aided design | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
| 650 | 4 | |a Metal oxide semiconductors, Complementary |x Computer-aided design | |
| 650 | 0 | 7 | |a Entwurfsautomation |0 (DE-588)4312536-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Layout |g Mikroelektronik |0 (DE-588)4264372-7 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Layout |g Mikroelektronik |0 (DE-588)4264372-7 |D s |
| 689 | 0 | 1 | |a Entwurfsautomation |0 (DE-588)4312536-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Kang, Sung-Mo S. |e Verfasser |4 aut | |
| 830 | 0 | |a The Kluwer international series in engineering and computer science |v 198 : VLSI, computer architecture and digital signal processing |w (DE-604)BV023545171 |9 198 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-006314976 | ||
Datensatz im Suchindex
| _version_ | 1804123898559594496 |
|---|---|
| any_adam_object | |
| author | Sapatnekar, Sachin S. Kang, Sung-Mo S. |
| author_facet | Sapatnekar, Sachin S. Kang, Sung-Mo S. |
| author_role | aut aut |
| author_sort | Sapatnekar, Sachin S. |
| author_variant | s s s ss sss s m s k sms smsk |
| building | Verbundindex |
| bvnumber | BV009557511 |
| callnumber-first | T - Technology |
| callnumber-label | TK7871 |
| callnumber-raw | TK7871.99.M44 |
| callnumber-search | TK7871.99.M44 |
| callnumber-sort | TK 47871.99 M44 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| classification_tum | ELT 272f |
| ctrlnum | (OCoLC)26541403 (DE-599)BVBBV009557511 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV009557511 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:37:05Z |
| institution | BVB |
| isbn | 0792392817 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006314976 |
| oclc_num | 26541403 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM DE-11 |
| owner_facet | DE-91 DE-BY-TUM DE-11 |
| physical | XX, 269 S. graph. Darst. |
| publishDate | 1993 |
| publishDateSearch | 1993 |
| publishDateSort | 1993 |
| publisher | Kluwer |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Sapatnekar, Sachin S. Verfasser aut Design automation for timing driven layout synthesis by Sachin S. Sapatnekar ; Sung-Mo (Steve) Kang Design automation for timing-driven layout synthesis Boston u.a. Kluwer 1993 XX, 269 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 198 : VLSI, computer architecture and digital signal processing Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Metal oxide semiconductors, Complementary Computer-aided design Entwurfsautomation (DE-588)4312536-0 gnd rswk-swf Layout Mikroelektronik (DE-588)4264372-7 gnd rswk-swf Layout Mikroelektronik (DE-588)4264372-7 s Entwurfsautomation (DE-588)4312536-0 s DE-604 Kang, Sung-Mo S. Verfasser aut The Kluwer international series in engineering and computer science 198 : VLSI, computer architecture and digital signal processing (DE-604)BV023545171 198 |
| spellingShingle | Sapatnekar, Sachin S. Kang, Sung-Mo S. Design automation for timing driven layout synthesis The Kluwer international series in engineering and computer science Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Metal oxide semiconductors, Complementary Computer-aided design Entwurfsautomation (DE-588)4312536-0 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd |
| subject_GND | (DE-588)4312536-0 (DE-588)4264372-7 |
| title | Design automation for timing driven layout synthesis |
| title_alt | Design automation for timing-driven layout synthesis |
| title_auth | Design automation for timing driven layout synthesis |
| title_exact_search | Design automation for timing driven layout synthesis |
| title_full | Design automation for timing driven layout synthesis by Sachin S. Sapatnekar ; Sung-Mo (Steve) Kang |
| title_fullStr | Design automation for timing driven layout synthesis by Sachin S. Sapatnekar ; Sung-Mo (Steve) Kang |
| title_full_unstemmed | Design automation for timing driven layout synthesis by Sachin S. Sapatnekar ; Sung-Mo (Steve) Kang |
| title_short | Design automation for timing driven layout synthesis |
| title_sort | design automation for timing driven layout synthesis |
| topic | Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Metal oxide semiconductors, Complementary Computer-aided design Entwurfsautomation (DE-588)4312536-0 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd |
| topic_facet | Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Metal oxide semiconductors, Complementary Computer-aided design Entwurfsautomation Layout Mikroelektronik |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT sapatnekarsachins designautomationfortimingdrivenlayoutsynthesis AT kangsungmos designautomationfortimingdrivenlayoutsynthesis |