Off-line routing with small queues on a mesh-connected processor array:

Abstract: "We present several efficient and simple algorithms for off-line routing that use very small queues. On an n x n mesh-connected processor array, we show a 2.5n step algorithm to off-line route permutations using queues of size 2, and a 2.25n + 3 step algorithm that uses queues of size...

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Bibliographic Details
Main Authors: Krizanc, Danny (Author), Narayanan, Lata (Author)
Format: Book
Language:English
Published: Rochester, NY 1991
Series:University of Rochester <Rochester, NY> / Department of Computer Science: Technical report 390
Subjects:
Summary:Abstract: "We present several efficient and simple algorithms for off-line routing that use very small queues. On an n x n mesh-connected processor array, we show a 2.5n step algorithm to off-line route permutations using queues of size 2, and a 2.25n + 3 step algorithm that uses queues of size 4. Our main result is that there exists an off-line algorithm for permutation routing on the n x n mesh-connected processor array, that takes 2.2n + 5 steps, and uses queues of size not more than 14. Our algorithms use novel and interesting techniques, and the bounds on the queue size are smaller than those of known algorithms with the same time complexity."
Physical Description:12 S.

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