Upper and lower bounds on switching energy in VLSI:

Abstract: "A technology independent framework is established for measuring the switching energy consumed by very large scale integrated (VLSI) circuits. Techniques are developed for analyzing functional energy consumption, and for designing energy-efficient VLSI circuits. A wire (or gate) in a...

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Bibliographic Details
Main Author: Kissin, Gloria (Author)
Format: Book
Language:English
Published: Amsterdam 1990
Series:Centrum voor Wiskunde en Informatica <Amsterdam> / Department of Computer Science: Report CS 90,44
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Online Access:Volltext
Summary:Abstract: "A technology independent framework is established for measuring the switching energy consumed by very large scale integrated (VLSI) circuits. Techniques are developed for analyzing functional energy consumption, and for designing energy-efficient VLSI circuits. A wire (or gate) in a circuit uses switching energy when it changes state from 1 to 0 or vice versa. This paper develops the Uniswitch Model (USM) of energy consumption, which measures the differences between pairs of states of an embedded circuit. The following worst case lower bounds are obtained in USM. Monotone circuits require switching energy proportional to the circuit's area
A class of n-input, boolean valued functions, including addition and multiplication, uses [omega](n log b2 s n) switching energy, when computed by a shallow depth circuit. A special case of the parity function is shown to require switching energy proportional to the area. This paper also derives upper bounds in USM. Novel circuits and layouts are obtained for n-bit OR and compare functions that have shallow depth and use only linear energy, in the worst case. A shallow depth n-bit addition circuit is laid out in a novel manner that uses linear energy, on the average. This is a log factor better than the worst case lower bound for addition.
Physical Description:35 S.

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