Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations:
Abstract: "In this paper we look at the problem of factoring large sparse systems of equations on high-performance multiprocessor workstations. While these multiprocessor workstations are capable of very high peak floating point computation rates, most existing sparse factorization codes achiev...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Stanford, Calif.
1990
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| Schriftenreihe: | Stanford University / Computer Science Department: Report STAN CS
1318 |
| Schlagworte: | |
| Zusammenfassung: | Abstract: "In this paper we look at the problem of factoring large sparse systems of equations on high-performance multiprocessor workstations. While these multiprocessor workstations are capable of very high peak floating point computation rates, most existing sparse factorization codes achieve only a small fraction of this potential. A major limiting factor is the cost of memory accesses performed during the factorization. In this paper, we describe a parallel factorization code which utilizes the supernodal structure of the matrix to reduce the number of memory references. We also propose enhancements that significantly reduce the overall cache miss rate The result is greatly increased factorization performance. We present experimental results from executions of our codes on the Silicon Graphics 4D/380 multiprocessor. Using eight processors, we find that the supernodal parallel code achieves a computation rate of approximately 40 MFLOPS when factoring a range of benchmark matrices. This is more than twice as fast as the parallel nodal code developed at the Oak Ridge National Laboratory running on the SGI 4D/380. |
| Beschreibung: | 12 S. |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV008950011 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 940206s1990 |||| 00||| eng d | ||
| 035 | |a (OCoLC)24023115 | ||
| 035 | |a (DE-599)BVBBV008950011 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-29T | ||
| 100 | 1 | |a Rothberg, Edward |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations |c Edward Rothberg and Anoop Gupta |
| 264 | 1 | |a Stanford, Calif. |c 1990 | |
| 300 | |a 12 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a Stanford University / Computer Science Department: Report STAN CS |v 1318 | |
| 520 | 3 | |a Abstract: "In this paper we look at the problem of factoring large sparse systems of equations on high-performance multiprocessor workstations. While these multiprocessor workstations are capable of very high peak floating point computation rates, most existing sparse factorization codes achieve only a small fraction of this potential. A major limiting factor is the cost of memory accesses performed during the factorization. In this paper, we describe a parallel factorization code which utilizes the supernodal structure of the matrix to reduce the number of memory references. We also propose enhancements that significantly reduce the overall cache miss rate | |
| 520 | 3 | |a The result is greatly increased factorization performance. We present experimental results from executions of our codes on the Silicon Graphics 4D/380 multiprocessor. Using eight processors, we find that the supernodal parallel code achieves a computation rate of approximately 40 MFLOPS when factoring a range of benchmark matrices. This is more than twice as fast as the parallel nodal code developed at the Oak Ridge National Laboratory running on the SGI 4D/380. | |
| 650 | 4 | |a Multiprocessors | |
| 700 | 1 | |a Gupta, Anoop |e Verfasser |4 aut | |
| 810 | 2 | |a Computer Science Department: Report STAN CS |t Stanford University |v 1318 |w (DE-604)BV008928280 |9 1318 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-005905615 | ||
Datensatz im Suchindex
| _version_ | 1804123283232129024 |
|---|---|
| any_adam_object | |
| author | Rothberg, Edward Gupta, Anoop |
| author_facet | Rothberg, Edward Gupta, Anoop |
| author_role | aut aut |
| author_sort | Rothberg, Edward |
| author_variant | e r er a g ag |
| building | Verbundindex |
| bvnumber | BV008950011 |
| ctrlnum | (OCoLC)24023115 (DE-599)BVBBV008950011 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02165nam a2200313 cb4500</leader><controlfield tag="001">BV008950011</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">940206s1990 |||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)24023115</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV008950011</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Rothberg, Edward</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations</subfield><subfield code="c">Edward Rothberg and Anoop Gupta</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Stanford, Calif.</subfield><subfield code="c">1990</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">12 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Stanford University / Computer Science Department: Report STAN CS</subfield><subfield code="v">1318</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">Abstract: "In this paper we look at the problem of factoring large sparse systems of equations on high-performance multiprocessor workstations. While these multiprocessor workstations are capable of very high peak floating point computation rates, most existing sparse factorization codes achieve only a small fraction of this potential. A major limiting factor is the cost of memory accesses performed during the factorization. In this paper, we describe a parallel factorization code which utilizes the supernodal structure of the matrix to reduce the number of memory references. We also propose enhancements that significantly reduce the overall cache miss rate</subfield></datafield><datafield tag="520" ind1="3" ind2=" "><subfield code="a">The result is greatly increased factorization performance. We present experimental results from executions of our codes on the Silicon Graphics 4D/380 multiprocessor. Using eight processors, we find that the supernodal parallel code achieves a computation rate of approximately 40 MFLOPS when factoring a range of benchmark matrices. This is more than twice as fast as the parallel nodal code developed at the Oak Ridge National Laboratory running on the SGI 4D/380.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Multiprocessors</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gupta, Anoop</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="810" ind1="2" ind2=" "><subfield code="a">Computer Science Department: Report STAN CS</subfield><subfield code="t">Stanford University</subfield><subfield code="v">1318</subfield><subfield code="w">(DE-604)BV008928280</subfield><subfield code="9">1318</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-005905615</subfield></datafield></record></collection> |
| id | DE-604.BV008950011 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T17:27:18Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-005905615 |
| oclc_num | 24023115 |
| open_access_boolean | |
| owner | DE-29T |
| owner_facet | DE-29T |
| physical | 12 S. |
| publishDate | 1990 |
| publishDateSearch | 1990 |
| publishDateSort | 1990 |
| record_format | marc |
| series2 | Stanford University / Computer Science Department: Report STAN CS |
| spelling | Rothberg, Edward Verfasser aut Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations Edward Rothberg and Anoop Gupta Stanford, Calif. 1990 12 S. txt rdacontent n rdamedia nc rdacarrier Stanford University / Computer Science Department: Report STAN CS 1318 Abstract: "In this paper we look at the problem of factoring large sparse systems of equations on high-performance multiprocessor workstations. While these multiprocessor workstations are capable of very high peak floating point computation rates, most existing sparse factorization codes achieve only a small fraction of this potential. A major limiting factor is the cost of memory accesses performed during the factorization. In this paper, we describe a parallel factorization code which utilizes the supernodal structure of the matrix to reduce the number of memory references. We also propose enhancements that significantly reduce the overall cache miss rate The result is greatly increased factorization performance. We present experimental results from executions of our codes on the Silicon Graphics 4D/380 multiprocessor. Using eight processors, we find that the supernodal parallel code achieves a computation rate of approximately 40 MFLOPS when factoring a range of benchmark matrices. This is more than twice as fast as the parallel nodal code developed at the Oak Ridge National Laboratory running on the SGI 4D/380. Multiprocessors Gupta, Anoop Verfasser aut Computer Science Department: Report STAN CS Stanford University 1318 (DE-604)BV008928280 1318 |
| spellingShingle | Rothberg, Edward Gupta, Anoop Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations Multiprocessors |
| title | Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations |
| title_auth | Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations |
| title_exact_search | Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations |
| title_full | Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations Edward Rothberg and Anoop Gupta |
| title_fullStr | Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations Edward Rothberg and Anoop Gupta |
| title_full_unstemmed | Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations Edward Rothberg and Anoop Gupta |
| title_short | Techniques for improving the Performance of sparse matrix factorization on multiprocessor workstations |
| title_sort | techniques for improving the performance of sparse matrix factorization on multiprocessor workstations |
| topic | Multiprocessors |
| topic_facet | Multiprocessors |
| volume_link | (DE-604)BV008928280 |
| work_keys_str_mv | AT rothbergedward techniquesforimprovingtheperformanceofsparsematrixfactorizationonmultiprocessorworkstations AT guptaanoop techniquesforimprovingtheperformanceofsparsematrixfactorizationonmultiprocessorworkstations |