Verfügbarkeit: A modal logic for handling behavioural constraints in formal hardware verification

A modal logic for handling behavioural constraints in formal hardware verification:

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Bibliographische Detailangaben
1. Verfasser:	Mendler, Michael V. (VerfasserIn)
Format:	Buch
Sprache:	English
Veröffentlicht:	Edinburgh Dep. of Computer Science 1993
Schlagworte:	Hardwareverifikation Modallogik Verhalten Logik Hardwareentwurf Beschränkung Hochschulschrift
Beschreibung:	Zugl.: Edinburgh, Univ., Diss., 1992
Beschreibung:	IX, 236 S. graph. Darst.

Internformat

MARC


LEADER	00000nam a2200000 c 4500
001	BV008399852
003	DE-604
005	20100329
007	t
008	931201s1993 d\|\|\| m\|\|\| 00\|\|\| eng d
035			\|a (OCoLC)632323612
035			\|a (DE-599)BVBBV008399852
040			\|a DE-604 \|b ger \|e rakddb
041	0		\|a eng
049			\|a DE-91G
084			\|a SS 4740 \|0 (DE-625)143515: \|2 rvk
084			\|a DAT 282d \|2 stub
084			\|a DAT 549d \|2 stub
088			\|a CST 97 93
088			\|a ECS LFCS 93 255
100	1		\|a Mendler, Michael V. \|e Verfasser \|4 aut
245	1	0	\|a A modal logic for handling behavioural constraints in formal hardware verification
246	1	3	\|a CST 97 93
246	1	3	\|a ECS LFCS 93 255
264		1	\|a Edinburgh \|b Dep. of Computer Science \|c 1993
300			\|a IX, 236 S. \|b graph. Darst.
336			\|b txt \|2 rdacontent
337			\|b n \|2 rdamedia
338			\|b nc \|2 rdacarrier
500			\|a Zugl.: Edinburgh, Univ., Diss., 1992
650	0	7	\|a Hardwareverifikation \|0 (DE-588)4214982-4 \|2 gnd \|9 rswk-swf
650	0	7	\|a Modallogik \|0 (DE-588)4074914-9 \|2 gnd \|9 rswk-swf
650	0	7	\|a Verhalten \|0 (DE-588)4062860-7 \|2 gnd \|9 rswk-swf
650	0	7	\|a Logik \|0 (DE-588)4036202-4 \|2 gnd \|9 rswk-swf
650	0	7	\|a Hardwareentwurf \|0 (DE-588)4159103-3 \|2 gnd \|9 rswk-swf
650	0	7	\|a Beschränkung \|0 (DE-588)4247482-6 \|2 gnd \|9 rswk-swf
655		7	\|0 (DE-588)4113937-9 \|a Hochschulschrift \|2 gnd-content
689	0	0	\|a Hardwareverifikation \|0 (DE-588)4214982-4 \|D s
689	0	1	\|a Logik \|0 (DE-588)4036202-4 \|D s
689	0		\|5 DE-604
689	1	0	\|a Hardwareverifikation \|0 (DE-588)4214982-4 \|D s
689	1	1	\|a Verhalten \|0 (DE-588)4062860-7 \|D s
689	1	2	\|a Beschränkung \|0 (DE-588)4247482-6 \|D s
689	1		\|8 1\p \|5 DE-604
689	2	0	\|a Modallogik \|0 (DE-588)4074914-9 \|D s
689	2	1	\|a Hardwareentwurf \|0 (DE-588)4159103-3 \|D s
689	2		\|8 2\p \|5 DE-604
689	3	0	\|a Hardwareverifikation \|0 (DE-588)4214982-4 \|D s
689	3	1	\|a Modallogik \|0 (DE-588)4074914-9 \|D s
689	3		\|8 3\p \|5 DE-604
999			\|a oai:aleph.bib-bvb.de:BVB01-005533976
883	1		\|8 1\p \|a cgwrk \|d 20201028 \|q DE-101 \|u https://d-nb.info/provenance/plan#cgwrk
883	1		\|8 2\p \|a cgwrk \|d 20201028 \|q DE-101 \|u https://d-nb.info/provenance/plan#cgwrk
883	1		\|8 3\p \|a cgwrk \|d 20201028 \|q DE-101 \|u https://d-nb.info/provenance/plan#cgwrk

Datensatz im Suchindex

_version_	1804122767994388480
any_adam_object
author	Mendler, Michael V.
author_facet	Mendler, Michael V.
author_role	aut
author_sort	Mendler, Michael V.
author_variant	m v m mv mvm
building	Verbundindex
bvnumber	BV008399852
classification_rvk	SS 4740
classification_tum	DAT 282d DAT 549d
ctrlnum	(OCoLC)632323612 (DE-599)BVBBV008399852
discipline	Informatik
format	Book
fullrecord	<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02273nam a2200613 c 4500</leader><controlfield tag="001">BV008399852</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20100329 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">931201s1993 d\|\|\| m\|\|\| 00\|\|\| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)632323612</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV008399852</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">SS 4740</subfield><subfield code="0">(DE-625)143515:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">DAT 282d</subfield><subfield code="2">stub</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">DAT 549d</subfield><subfield code="2">stub</subfield></datafield><datafield tag="088" ind1=" " ind2=" "><subfield code="a">CST 97 93</subfield></datafield><datafield tag="088" ind1=" " ind2=" "><subfield code="a">ECS LFCS 93 255</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Mendler, Michael V.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">A modal logic for handling behavioural constraints in formal hardware verification</subfield></datafield><datafield tag="246" ind1="1" ind2="3"><subfield code="a">CST 97 93</subfield></datafield><datafield tag="246" ind1="1" ind2="3"><subfield code="a">ECS LFCS 93 255</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Edinburgh</subfield><subfield code="b">Dep. of Computer Science</subfield><subfield code="c">1993</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">IX, 236 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Zugl.: Edinburgh, Univ., Diss., 1992</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Hardwareverifikation</subfield><subfield code="0">(DE-588)4214982-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Modallogik</subfield><subfield code="0">(DE-588)4074914-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Verhalten</subfield><subfield code="0">(DE-588)4062860-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logik</subfield><subfield code="0">(DE-588)4036202-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Hardwareentwurf</subfield><subfield code="0">(DE-588)4159103-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Beschränkung</subfield><subfield code="0">(DE-588)4247482-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4113937-9</subfield><subfield code="a">Hochschulschrift</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Hardwareverifikation</subfield><subfield code="0">(DE-588)4214982-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Logik</subfield><subfield code="0">(DE-588)4036202-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Hardwareverifikation</subfield><subfield code="0">(DE-588)4214982-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Verhalten</subfield><subfield code="0">(DE-588)4062860-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="2"><subfield code="a">Beschränkung</subfield><subfield code="0">(DE-588)4247482-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">Modallogik</subfield><subfield code="0">(DE-588)4074914-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2="1"><subfield code="a">Hardwareentwurf</subfield><subfield code="0">(DE-588)4159103-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="3" ind2="0"><subfield code="a">Hardwareverifikation</subfield><subfield code="0">(DE-588)4214982-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="3" ind2="1"><subfield code="a">Modallogik</subfield><subfield code="0">(DE-588)4074914-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="3" ind2=" "><subfield code="8">3\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-005533976</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">3\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection>
genre	(DE-588)4113937-9 Hochschulschrift gnd-content
genre_facet	Hochschulschrift
id	DE-604.BV008399852
illustrated	Illustrated
indexdate	2024-07-09T17:19:07Z
institution	BVB
language	English
oai_aleph_id	oai:aleph.bib-bvb.de:BVB01-005533976
oclc_num	632323612
open_access_boolean
owner	DE-91G DE-BY-TUM
owner_facet	DE-91G DE-BY-TUM
physical	IX, 236 S. graph. Darst.
publishDate	1993
publishDateSearch	1993
publishDateSort	1993
publisher	Dep. of Computer Science
record_format	marc
spelling	Mendler, Michael V. Verfasser aut A modal logic for handling behavioural constraints in formal hardware verification CST 97 93 ECS LFCS 93 255 Edinburgh Dep. of Computer Science 1993 IX, 236 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Zugl.: Edinburgh, Univ., Diss., 1992 Hardwareverifikation (DE-588)4214982-4 gnd rswk-swf Modallogik (DE-588)4074914-9 gnd rswk-swf Verhalten (DE-588)4062860-7 gnd rswk-swf Logik (DE-588)4036202-4 gnd rswk-swf Hardwareentwurf (DE-588)4159103-3 gnd rswk-swf Beschränkung (DE-588)4247482-6 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Hardwareverifikation (DE-588)4214982-4 s Logik (DE-588)4036202-4 s DE-604 Verhalten (DE-588)4062860-7 s Beschränkung (DE-588)4247482-6 s 1\p DE-604 Modallogik (DE-588)4074914-9 s Hardwareentwurf (DE-588)4159103-3 s 2\p DE-604 3\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 3\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk
spellingShingle	Mendler, Michael V. A modal logic for handling behavioural constraints in formal hardware verification Hardwareverifikation (DE-588)4214982-4 gnd Modallogik (DE-588)4074914-9 gnd Verhalten (DE-588)4062860-7 gnd Logik (DE-588)4036202-4 gnd Hardwareentwurf (DE-588)4159103-3 gnd Beschränkung (DE-588)4247482-6 gnd
subject_GND	(DE-588)4214982-4 (DE-588)4074914-9 (DE-588)4062860-7 (DE-588)4036202-4 (DE-588)4159103-3 (DE-588)4247482-6 (DE-588)4113937-9
title	A modal logic for handling behavioural constraints in formal hardware verification
title_alt	CST 97 93 ECS LFCS 93 255
title_auth	A modal logic for handling behavioural constraints in formal hardware verification
title_exact_search	A modal logic for handling behavioural constraints in formal hardware verification
title_full	A modal logic for handling behavioural constraints in formal hardware verification
title_fullStr	A modal logic for handling behavioural constraints in formal hardware verification
title_full_unstemmed	A modal logic for handling behavioural constraints in formal hardware verification
title_short	A modal logic for handling behavioural constraints in formal hardware verification
title_sort	a modal logic for handling behavioural constraints in formal hardware verification
topic	Hardwareverifikation (DE-588)4214982-4 gnd Modallogik (DE-588)4074914-9 gnd Verhalten (DE-588)4062860-7 gnd Logik (DE-588)4036202-4 gnd Hardwareentwurf (DE-588)4159103-3 gnd Beschränkung (DE-588)4247482-6 gnd
topic_facet	Hardwareverifikation Modallogik Verhalten Logik Hardwareentwurf Beschränkung Hochschulschrift
work_keys_str_mv	AT mendlermichaelv amodallogicforhandlingbehaviouralconstraintsinformalhardwareverification AT mendlermichaelv cst9793 AT mendlermichaelv ecslfcs93255

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