Self testing VLSI design:
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Amsterdam u.a.
Elsevier
1993
|
| Subjects: | |
| Item Description: | Literaturverz. S. [329] - 341 |
| Physical Description: | XI, 345 S. graph. Darst. |
| ISBN: | 0444896406 |
Staff View
MARC
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Record in the Search Index
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| author | Jarmolik, Vjačeslav N. Kachan, I. V. |
| author_facet | Jarmolik, Vjačeslav N. Kachan, I. V. |
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| bvnumber | BV008018045 |
| callnumber-first | T - Technology |
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| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_tum | ELT 272f ELT 359f |
| ctrlnum | (OCoLC)27226281 (DE-599)BVBBV008018045 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV008018045 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T17:12:58Z |
| institution | BVB |
| isbn | 0444896406 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-005275181 |
| oclc_num | 27226281 |
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| owner_facet | DE-M347 DE-91 DE-BY-TUM DE-29T |
| physical | XI, 345 S. graph. Darst. |
| publishDate | 1993 |
| publishDateSearch | 1993 |
| publishDateSort | 1993 |
| publisher | Elsevier |
| record_format | marc |
| spelling | Jarmolik, Vjačeslav N. Verfasser aut Self testing VLSI design V. N. Yarmolik ; I. V. Kachan Self-testing VLSI design Amsterdam u.a. Elsevier 1993 XI, 345 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Literaturverz. S. [329] - 341 Autotest Circuits intégrés à très grande échelle - Essais ram Test VLSI VLSI Integrated circuits Very large scale integration Design Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd rswk-swf Selbsttest (DE-588)4054433-3 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Entwurf (DE-588)4121208-3 s VLSI (DE-588)4117388-0 s Selbsttest (DE-588)4054433-3 s DE-604 Kachan, I. V. Verfasser aut |
| spellingShingle | Jarmolik, Vjačeslav N. Kachan, I. V. Self testing VLSI design Autotest Circuits intégrés à très grande échelle - Essais ram Test VLSI VLSI Integrated circuits Very large scale integration Design Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd Selbsttest (DE-588)4054433-3 gnd Entwurf (DE-588)4121208-3 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4054433-3 (DE-588)4121208-3 |
| title | Self testing VLSI design |
| title_alt | Self-testing VLSI design |
| title_auth | Self testing VLSI design |
| title_exact_search | Self testing VLSI design |
| title_full | Self testing VLSI design V. N. Yarmolik ; I. V. Kachan |
| title_fullStr | Self testing VLSI design V. N. Yarmolik ; I. V. Kachan |
| title_full_unstemmed | Self testing VLSI design V. N. Yarmolik ; I. V. Kachan |
| title_short | Self testing VLSI design |
| title_sort | self testing vlsi design |
| topic | Autotest Circuits intégrés à très grande échelle - Essais ram Test VLSI VLSI Integrated circuits Very large scale integration Design Integrated circuits Very large scale integration Testing VLSI (DE-588)4117388-0 gnd Selbsttest (DE-588)4054433-3 gnd Entwurf (DE-588)4121208-3 gnd |
| topic_facet | Autotest Circuits intégrés à très grande échelle - Essais Test VLSI VLSI Integrated circuits Very large scale integration Design Integrated circuits Very large scale integration Testing Selbsttest Entwurf |
| work_keys_str_mv | AT jarmolikvjaceslavn selftestingvlsidesign AT kachaniv selftestingvlsidesign |