High level synthesis of ASICs under timing and synchronization constraints:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston u.a.
Kluwer Acad. Publ.
1992
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
177.: VLSI, computer architecture and digital signal processing |
| Schlagworte: | |
| Beschreibung: | XIII, 294 S. graph. Darst. |
| ISBN: | 0792392442 |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV006607312 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 930210s1992 d||| |||| 00||| eng d | ||
| 020 | |a 0792392442 |9 0-7923-9244-2 | ||
| 035 | |a (OCoLC)25628783 | ||
| 035 | |a (DE-599)BVBBV006607312 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-29T |a DE-739 |a DE-83 | ||
| 050 | 0 | |a TK7874.6 | |
| 082 | 0 | |a 621.381/5 |2 20 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 100 | 1 | |a Ku, David C. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a High level synthesis of ASICs under timing and synchronization constraints |c by David C. Ku and Giovanni de Micheli |
| 264 | 1 | |a Boston u.a. |b Kluwer Acad. Publ. |c 1992 | |
| 300 | |a XIII, 294 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 177.: VLSI, computer architecture and digital signal processing | |
| 650 | 7 | |a Circuits intégrés |2 ram | |
| 650 | 7 | |a Ordinateurs |2 ram | |
| 650 | 7 | |a synthèse circuit |2 inriac | |
| 650 | 4 | |a Application specific integrated circuits |x Computer-aided design | |
| 650 | 0 | 7 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Kundenspezifische Schaltung |0 (DE-588)4122250-7 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Kundenspezifische Schaltung |0 (DE-588)4122250-7 |D s |
| 689 | 0 | 1 | |a Schaltungsentwurf |0 (DE-588)4179389-4 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a De Micheli, Giovanni |d 1955- |e Verfasser |0 (DE-588)114063575 |4 aut | |
| 830 | 0 | |a The Kluwer international series in engineering and computer science |v 177.: VLSI, computer architecture and digital signal processing |w (DE-604)BV023545171 |9 177 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-004220885 | ||
Datensatz im Suchindex
| _version_ | 1804120882244747264 |
|---|---|
| any_adam_object | |
| author | Ku, David C. De Micheli, Giovanni 1955- |
| author_GND | (DE-588)114063575 |
| author_facet | Ku, David C. De Micheli, Giovanni 1955- |
| author_role | aut aut |
| author_sort | Ku, David C. |
| author_variant | d c k dc dck m g d mg mgd |
| building | Verbundindex |
| bvnumber | BV006607312 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874.6 |
| callnumber-search | TK7874.6 |
| callnumber-sort | TK 47874.6 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| ctrlnum | (OCoLC)25628783 (DE-599)BVBBV006607312 |
| dewey-full | 621.381/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381/5 |
| dewey-search | 621.381/5 |
| dewey-sort | 3621.381 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01788nam a2200433 cb4500</leader><controlfield tag="001">BV006607312</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">930210s1992 d||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0792392442</subfield><subfield code="9">0-7923-9244-2</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)25628783</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV006607312</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-83</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874.6</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381/5</subfield><subfield code="2">20</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Ku, David C.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">High level synthesis of ASICs under timing and synchronization constraints</subfield><subfield code="c">by David C. Ku and Giovanni de Micheli</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston u.a.</subfield><subfield code="b">Kluwer Acad. Publ.</subfield><subfield code="c">1992</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XIII, 294 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">177.: VLSI, computer architecture and digital signal processing</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuits intégrés</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Ordinateurs</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">synthèse circuit</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Application specific integrated circuits</subfield><subfield code="x">Computer-aided design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Kundenspezifische Schaltung</subfield><subfield code="0">(DE-588)4122250-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Kundenspezifische Schaltung</subfield><subfield code="0">(DE-588)4122250-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Schaltungsentwurf</subfield><subfield code="0">(DE-588)4179389-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">De Micheli, Giovanni</subfield><subfield code="d">1955-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)114063575</subfield><subfield code="4">aut</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">177.: VLSI, computer architecture and digital signal processing</subfield><subfield code="w">(DE-604)BV023545171</subfield><subfield code="9">177</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-004220885</subfield></datafield></record></collection> |
| id | DE-604.BV006607312 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:49:09Z |
| institution | BVB |
| isbn | 0792392442 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-004220885 |
| oclc_num | 25628783 |
| open_access_boolean | |
| owner | DE-29T DE-739 DE-83 |
| owner_facet | DE-29T DE-739 DE-83 |
| physical | XIII, 294 S. graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Kluwer Acad. Publ. |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Ku, David C. Verfasser aut High level synthesis of ASICs under timing and synchronization constraints by David C. Ku and Giovanni de Micheli Boston u.a. Kluwer Acad. Publ. 1992 XIII, 294 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 177.: VLSI, computer architecture and digital signal processing Circuits intégrés ram Ordinateurs ram synthèse circuit inriac Application specific integrated circuits Computer-aided design Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 De Micheli, Giovanni 1955- Verfasser (DE-588)114063575 aut The Kluwer international series in engineering and computer science 177.: VLSI, computer architecture and digital signal processing (DE-604)BV023545171 177 |
| spellingShingle | Ku, David C. De Micheli, Giovanni 1955- High level synthesis of ASICs under timing and synchronization constraints The Kluwer international series in engineering and computer science Circuits intégrés ram Ordinateurs ram synthèse circuit inriac Application specific integrated circuits Computer-aided design Schaltungsentwurf (DE-588)4179389-4 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
| subject_GND | (DE-588)4179389-4 (DE-588)4122250-7 |
| title | High level synthesis of ASICs under timing and synchronization constraints |
| title_auth | High level synthesis of ASICs under timing and synchronization constraints |
| title_exact_search | High level synthesis of ASICs under timing and synchronization constraints |
| title_full | High level synthesis of ASICs under timing and synchronization constraints by David C. Ku and Giovanni de Micheli |
| title_fullStr | High level synthesis of ASICs under timing and synchronization constraints by David C. Ku and Giovanni de Micheli |
| title_full_unstemmed | High level synthesis of ASICs under timing and synchronization constraints by David C. Ku and Giovanni de Micheli |
| title_short | High level synthesis of ASICs under timing and synchronization constraints |
| title_sort | high level synthesis of asics under timing and synchronization constraints |
| topic | Circuits intégrés ram Ordinateurs ram synthèse circuit inriac Application specific integrated circuits Computer-aided design Schaltungsentwurf (DE-588)4179389-4 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
| topic_facet | Circuits intégrés Ordinateurs synthèse circuit Application specific integrated circuits Computer-aided design Schaltungsentwurf Kundenspezifische Schaltung |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT kudavidc highlevelsynthesisofasicsundertimingandsynchronizationconstraints AT demicheligiovanni highlevelsynthesisofasicsundertimingandsynchronizationconstraints |