Algorithms and parallel VLSI architectures II: proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991
Gespeichert in:
| Format: | Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
Amsterdam u.a.
Elsevier
1992
|
| Schlagworte: | |
| Beschreibung: | XVI, 388 S. graph. Darst. |
| ISBN: | 0444891536 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV006321109 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 930222s1992 d||| |||| 10||| engod | ||
| 020 | |a 0444891536 |9 0-444-89153-6 | ||
| 035 | |a (OCoLC)24699123 | ||
| 035 | |a (DE-599)BVBBV006321109 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-12 | ||
| 050 | 0 | |a QA76.58 | |
| 082 | 0 | |a 004/.35 |2 20 | |
| 245 | 1 | 0 | |a Algorithms and parallel VLSI architectures II |b proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 |c ed. by Patrice Quinton ... |
| 264 | 1 | |a Amsterdam u.a. |b Elsevier |c 1992 | |
| 300 | |a XVI, 388 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Computer algorithms |v Congresses | |
| 650 | 4 | |a Computer architecture |v Congresses | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |v Congresses | |
| 650 | 4 | |a Parallel processing (Electronic computers) |v Congresses | |
| 650 | 0 | 7 | |a Paralleler Algorithmus |0 (DE-588)4193615-2 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Computerarchitektur |0 (DE-588)4048717-9 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)1071861417 |a Konferenzschrift |y 1991 |z Gers |2 gnd-content | |
| 689 | 0 | 0 | |a Paralleler Algorithmus |0 (DE-588)4193615-2 |D s |
| 689 | 0 | 1 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 2 | |a Computerarchitektur |0 (DE-588)4048717-9 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Quinton, Patrice |e Sonstige |4 oth | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-003999234 | ||
Datensatz im Suchindex
| _version_ | 1804120538325450752 |
|---|---|
| any_adam_object | |
| building | Verbundindex |
| bvnumber | BV006321109 |
| callnumber-first | Q - Science |
| callnumber-label | QA76 |
| callnumber-raw | QA76.58 |
| callnumber-search | QA76.58 |
| callnumber-sort | QA 276.58 |
| callnumber-subject | QA - Mathematics |
| ctrlnum | (OCoLC)24699123 (DE-599)BVBBV006321109 |
| dewey-full | 004/.35 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 004 - Computer science |
| dewey-raw | 004/.35 |
| dewey-search | 004/.35 |
| dewey-sort | 14 235 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01628nam a2200421 c 4500</leader><controlfield tag="001">BV006321109</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">930222s1992 d||| |||| 10||| engod</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0444891536</subfield><subfield code="9">0-444-89153-6</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)24699123</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV006321109</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-12</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">QA76.58</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">004/.35</subfield><subfield code="2">20</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Algorithms and parallel VLSI architectures II</subfield><subfield code="b">proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991</subfield><subfield code="c">ed. by Patrice Quinton ...</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Amsterdam u.a.</subfield><subfield code="b">Elsevier</subfield><subfield code="c">1992</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XVI, 388 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer algorithms</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer architecture</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Parallel processing (Electronic computers)</subfield><subfield code="v">Congresses</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Paralleler Algorithmus</subfield><subfield code="0">(DE-588)4193615-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)1071861417</subfield><subfield code="a">Konferenzschrift</subfield><subfield code="y">1991</subfield><subfield code="z">Gers</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Paralleler Algorithmus</subfield><subfield code="0">(DE-588)4193615-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Quinton, Patrice</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-003999234</subfield></datafield></record></collection> |
| genre | (DE-588)1071861417 Konferenzschrift 1991 Gers gnd-content |
| genre_facet | Konferenzschrift 1991 Gers |
| id | DE-604.BV006321109 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:43:41Z |
| institution | BVB |
| isbn | 0444891536 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-003999234 |
| oclc_num | 24699123 |
| open_access_boolean | |
| owner | DE-12 |
| owner_facet | DE-12 |
| physical | XVI, 388 S. graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Elsevier |
| record_format | marc |
| spelling | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 ed. by Patrice Quinton ... Amsterdam u.a. Elsevier 1992 XVI, 388 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Computer algorithms Congresses Computer architecture Congresses Integrated circuits Very large scale integration Congresses Parallel processing (Electronic computers) Congresses Paralleler Algorithmus (DE-588)4193615-2 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Computerarchitektur (DE-588)4048717-9 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1991 Gers gnd-content Paralleler Algorithmus (DE-588)4193615-2 s VLSI (DE-588)4117388-0 s Computerarchitektur (DE-588)4048717-9 s DE-604 Quinton, Patrice Sonstige oth |
| spellingShingle | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 Computer algorithms Congresses Computer architecture Congresses Integrated circuits Very large scale integration Congresses Parallel processing (Electronic computers) Congresses Paralleler Algorithmus (DE-588)4193615-2 gnd VLSI (DE-588)4117388-0 gnd Computerarchitektur (DE-588)4048717-9 gnd |
| subject_GND | (DE-588)4193615-2 (DE-588)4117388-0 (DE-588)4048717-9 (DE-588)1071861417 |
| title | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 |
| title_auth | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 |
| title_exact_search | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 |
| title_full | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 ed. by Patrice Quinton ... |
| title_fullStr | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 ed. by Patrice Quinton ... |
| title_full_unstemmed | Algorithms and parallel VLSI architectures II proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 ed. by Patrice Quinton ... |
| title_short | Algorithms and parallel VLSI architectures II |
| title_sort | algorithms and parallel vlsi architectures ii proceedings of the international workshop algorithms and parallel vlsi architectures ii chateau de bonas gers france june 3 6 1991 |
| title_sub | proceedings of the International Workshop Algorithms and Parallel VLSI Architectures II, Château de Bonas, Gers, France, June 3 - 6, 1991 |
| topic | Computer algorithms Congresses Computer architecture Congresses Integrated circuits Very large scale integration Congresses Parallel processing (Electronic computers) Congresses Paralleler Algorithmus (DE-588)4193615-2 gnd VLSI (DE-588)4117388-0 gnd Computerarchitektur (DE-588)4048717-9 gnd |
| topic_facet | Computer algorithms Congresses Computer architecture Congresses Integrated circuits Very large scale integration Congresses Parallel processing (Electronic computers) Congresses Paralleler Algorithmus VLSI Computerarchitektur Konferenzschrift 1991 Gers |
| work_keys_str_mv | AT quintonpatrice algorithmsandparallelvlsiarchitecturesiiproceedingsoftheinternationalworkshopalgorithmsandparallelvlsiarchitecturesiichateaudebonasgersfrancejune361991 |