Hardware annealing in analog VLSI neurocomputing:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston u.a.
Kluwer Acad. Publ.
1991
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
127.: VLSI computer architecture and digital signal processing |
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | Literaturverz. S. 219 - 230 |
| Beschreibung: | XX, 234 S. Ill., graph. Darst. |
| ISBN: | 0792391322 |
Internformat
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Datensatz im Suchindex
| _version_ | 1804120038327713792 |
|---|---|
| adam_text | HARDWARE ANNEALING
IN ANALOG VLSI
NEUROCOMPUTING
by
Bang W Lee
University of Southern California
and
Bing J Sheu
University of Southern California
L4
ff
KLUWER ACADEMIC PUBLISHERS
Boston/Dordrecht/London
Table of Contents
List of Figures viii
List of Tables xiii
Preface xv
Acknowledgement : xix
1 Introduction 1
1 1 Overview of Neural Architectures 4
1 2 VLSI Neural Network Design Methodology 11
2 VLSI Hopfield Networks 21
2 1 Circuit Dynamics of Hopfield Networks 23
2 2 Existence of Local Minima 25
2 3 Elimination of Local Minima 28
2 4 Neural-Based A/D Converter Without Local Minima 32
241 The Step Function Approach 38
242 The Correction Logic Approach 43
2 5 Traveling Salesman Problem 50
251 Competitive-Hopfield Network Approach 54
252 Search for Optimal Solution 56
3 Hardware Annealing Theory 67
3 1 Simulated Annealing in Software Computation 67
3 2 Hardware Annealing 70
321 Starting Voltage Gain of the Cooling Schedule 71
322 Final Voltage Gain of the Cooling Schedule 75
3 3 Application to the Neural-Based A/D Converter 77
331 Neuron Gain Requirement 78
332 Relaxed Gain Requirement Using Modified Synapse
Weightings 82
4 Programmable Synapses and Gain-Adjustable Neurons 89
4 1 Compact and Programmable Neural Chips 90
4 2 Medium-Term and Long-Term Storage of Synapse Weight 100
421 DRAM-Style Weight Storage 100
422 EEPROM-Style Weight Storage 104
5 System Integration for VLSI Neurocomputing 117
5 1 System Module Using Programmable Neural Chip 117
5 2 Application Examples 121
521 Hopfield Neural-Based A/D Converter 121
522 Modified Hopfield Network for Image Restoration 131
6 Alternative VLSI Neural Chips 143
6 1 Neural Sensory Chips 145
6 2 Various Analog Neural Chips 151
621 Analog Neurons 152
622 Synapses with Fixed Weights 155
623 Programmable Synapses 161
6 3 Various Digital Neural Chips 164
Conclusions and Future Work 175
VI
Appendixes 179
A Program for Neural-Based A/D Conversion and Traveling
Salesman Problems 179
B Non-Saturated Input Stage for Wide-Range Synapse
Circuits 203
C SPICE CMOS LEVEL-2 and LEVEL-4 Model Files 209
Bibliography 219
Index 231
vu
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| illustrated | Illustrated |
| indexdate | 2024-07-09T16:35:44Z |
| institution | BVB |
| isbn | 0792391322 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-003662019 |
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| physical | XX, 234 S. Ill., graph. Darst. |
| publishDate | 1991 |
| publishDateSearch | 1991 |
| publishDateSort | 1991 |
| publisher | Kluwer Acad. Publ. |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Lee, Bang W. Verfasser aut Hardware annealing in analog VLSI neurocomputing by Bang W. Lee and Bing J. Sheu Boston u.a. Kluwer Acad. Publ. 1991 XX, 234 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 127.: VLSI computer architecture and digital signal processing Literaturverz. S. 219 - 230 Integrated circuits Very large scale integration Neural computers Circuits Neural networks (Computer science) Simulated annealing (Mathematics) Analoge integrierte Schaltung (DE-588)4112519-8 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Simulation (DE-588)4055072-2 gnd rswk-swf Neuronales Netz (DE-588)4226127-2 gnd rswk-swf Analoge integrierte Schaltung (DE-588)4112519-8 s VLSI (DE-588)4117388-0 s Neuronales Netz (DE-588)4226127-2 s Simulation (DE-588)4055072-2 s DE-604 Sheu, Bing J. Verfasser aut The Kluwer international series in engineering and computer science 127.: VLSI computer architecture and digital signal processing (DE-604)BV023545171 127 HEBIS Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=003662019&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Lee, Bang W. Sheu, Bing J. Hardware annealing in analog VLSI neurocomputing The Kluwer international series in engineering and computer science Integrated circuits Very large scale integration Neural computers Circuits Neural networks (Computer science) Simulated annealing (Mathematics) Analoge integrierte Schaltung (DE-588)4112519-8 gnd VLSI (DE-588)4117388-0 gnd Simulation (DE-588)4055072-2 gnd Neuronales Netz (DE-588)4226127-2 gnd |
| subject_GND | (DE-588)4112519-8 (DE-588)4117388-0 (DE-588)4055072-2 (DE-588)4226127-2 |
| title | Hardware annealing in analog VLSI neurocomputing |
| title_auth | Hardware annealing in analog VLSI neurocomputing |
| title_exact_search | Hardware annealing in analog VLSI neurocomputing |
| title_full | Hardware annealing in analog VLSI neurocomputing by Bang W. Lee and Bing J. Sheu |
| title_fullStr | Hardware annealing in analog VLSI neurocomputing by Bang W. Lee and Bing J. Sheu |
| title_full_unstemmed | Hardware annealing in analog VLSI neurocomputing by Bang W. Lee and Bing J. Sheu |
| title_short | Hardware annealing in analog VLSI neurocomputing |
| title_sort | hardware annealing in analog vlsi neurocomputing |
| topic | Integrated circuits Very large scale integration Neural computers Circuits Neural networks (Computer science) Simulated annealing (Mathematics) Analoge integrierte Schaltung (DE-588)4112519-8 gnd VLSI (DE-588)4117388-0 gnd Simulation (DE-588)4055072-2 gnd Neuronales Netz (DE-588)4226127-2 gnd |
| topic_facet | Integrated circuits Very large scale integration Neural computers Circuits Neural networks (Computer science) Simulated annealing (Mathematics) Analoge integrierte Schaltung VLSI Simulation Neuronales Netz |
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