Optimal VLSI architectural synthesis: area, performance and testability
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston u.a.
Kluwer
1992
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
158.: VLSI, computer architecture and digital signal processing |
| Schlagworte: | |
| Beschreibung: | Literaturverz. S. 271 - 285 |
| Beschreibung: | XIV, 289 S. graph. Darst. |
| ISBN: | 079239223X |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV005595496 | ||
| 003 | DE-604 | ||
| 005 | 20241028 | ||
| 007 | t | ||
| 008 | 921016s1992 d||| |||| 00||| engod | ||
| 020 | |a 079239223X |9 0-7923-9223-X | ||
| 035 | |a (OCoLC)24318677 | ||
| 035 | |a (DE-599)BVBBV005595496 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91 |a DE-12 |a DE-739 |a DE-29T | ||
| 050 | 0 | |a QA76.9.A73 | |
| 082 | 0 | |a 004.2/2 |2 20 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 084 | |a ELT 272f |2 stub | ||
| 100 | 1 | |a Gebotys, Catherine H. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Optimal VLSI architectural synthesis |b area, performance and testability |c Catherine H. Gebotys and Mohamed I. Elmasry |
| 264 | 1 | |a Boston u.a. |b Kluwer |c 1992 | |
| 300 | |a XIV, 289 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 158.: VLSI, computer architecture and digital signal processing | |
| 500 | |a Literaturverz. S. 271 - 285 | ||
| 650 | 7 | |a Architecture des ordinateurs |2 ram | |
| 650 | 4 | |a Architecture ordinateur | |
| 650 | 7 | |a Circuitos integrados |2 larpcal | |
| 650 | 4 | |a Circuits intégrés à très grande échelle | |
| 650 | 7 | |a Circuits intégrés à très grande échelle |2 ram | |
| 650 | 4 | |a Ordinateurs - Architecture | |
| 650 | 4 | |a VLSI | |
| 650 | 4 | |a Computer architecture | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration | |
| 650 | 0 | 7 | |a Computerarchitektur |0 (DE-588)4048717-9 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Layout |g Mikroelektronik |0 (DE-588)4264372-7 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Computerarchitektur |0 (DE-588)4048717-9 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Layout |g Mikroelektronik |0 (DE-588)4264372-7 |D s |
| 689 | 1 | |5 DE-604 | |
| 700 | 1 | |a Elmasry, Mohamed I. |d 1943- |e Verfasser |0 (DE-588)143711873 |4 aut | |
| 830 | 0 | |a The Kluwer international series in engineering and computer science |v 158.: VLSI, computer architecture and digital signal processing |w (DE-604)BV023545171 |9 158 | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-003505178 | |
Datensatz im Suchindex
| _version_ | 1814177909917614080 |
|---|---|
| adam_text | |
| any_adam_object | |
| author | Gebotys, Catherine H. Elmasry, Mohamed I. 1943- |
| author_GND | (DE-588)143711873 |
| author_facet | Gebotys, Catherine H. Elmasry, Mohamed I. 1943- |
| author_role | aut aut |
| author_sort | Gebotys, Catherine H. |
| author_variant | c h g ch chg m i e mi mie |
| building | Verbundindex |
| bvnumber | BV005595496 |
| callnumber-first | Q - Science |
| callnumber-label | QA76 |
| callnumber-raw | QA76.9.A73 |
| callnumber-search | QA76.9.A73 |
| callnumber-sort | QA 276.9 A73 |
| callnumber-subject | QA - Mathematics |
| classification_rvk | ST 190 |
| classification_tum | ELT 272f |
| ctrlnum | (OCoLC)24318677 (DE-599)BVBBV005595496 |
| dewey-full | 004.2/2 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 004 - Computer science |
| dewey-raw | 004.2/2 |
| dewey-search | 004.2/2 |
| dewey-sort | 14.2 12 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik Elektrotechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000 cb4500</leader><controlfield tag="001">BV005595496</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20241028</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">921016s1992 d||| |||| 00||| engod</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">079239223X</subfield><subfield code="9">0-7923-9223-X</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)24318677</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV005595496</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield><subfield code="a">DE-12</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-29T</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">QA76.9.A73</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">004.2/2</subfield><subfield code="2">20</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 272f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Gebotys, Catherine H.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Optimal VLSI architectural synthesis</subfield><subfield code="b">area, performance and testability</subfield><subfield code="c">Catherine H. Gebotys and Mohamed I. Elmasry</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston u.a.</subfield><subfield code="b">Kluwer</subfield><subfield code="c">1992</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XIV, 289 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">158.: VLSI, computer architecture and digital signal processing</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Literaturverz. S. 271 - 285</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Architecture des ordinateurs</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Architecture ordinateur</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuitos integrados</subfield><subfield code="2">larpcal</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuits intégrés à très grande échelle</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ordinateurs - Architecture</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">VLSI</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer architecture</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Layout</subfield><subfield code="g">Mikroelektronik</subfield><subfield code="0">(DE-588)4264372-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Layout</subfield><subfield code="g">Mikroelektronik</subfield><subfield code="0">(DE-588)4264372-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Elmasry, Mohamed I.</subfield><subfield code="d">1943-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)143711873</subfield><subfield code="4">aut</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">158.: VLSI, computer architecture and digital signal processing</subfield><subfield code="w">(DE-604)BV023545171</subfield><subfield code="9">158</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-003505178</subfield></datafield></record></collection> |
| id | DE-604.BV005595496 |
| illustrated | Illustrated |
| indexdate | 2024-10-28T17:01:17Z |
| institution | BVB |
| isbn | 079239223X |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-003505178 |
| oclc_num | 24318677 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM DE-12 DE-739 DE-29T |
| owner_facet | DE-91 DE-BY-TUM DE-12 DE-739 DE-29T |
| physical | XIV, 289 S. graph. Darst. |
| publishDate | 1992 |
| publishDateSearch | 1992 |
| publishDateSort | 1992 |
| publisher | Kluwer |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Gebotys, Catherine H. Verfasser aut Optimal VLSI architectural synthesis area, performance and testability Catherine H. Gebotys and Mohamed I. Elmasry Boston u.a. Kluwer 1992 XIV, 289 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 158.: VLSI, computer architecture and digital signal processing Literaturverz. S. 271 - 285 Architecture des ordinateurs ram Architecture ordinateur Circuitos integrados larpcal Circuits intégrés à très grande échelle Circuits intégrés à très grande échelle ram Ordinateurs - Architecture VLSI Computer architecture Integrated circuits Very large scale integration Computerarchitektur (DE-588)4048717-9 gnd rswk-swf Layout Mikroelektronik (DE-588)4264372-7 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Computerarchitektur (DE-588)4048717-9 s DE-604 Layout Mikroelektronik (DE-588)4264372-7 s Elmasry, Mohamed I. 1943- Verfasser (DE-588)143711873 aut The Kluwer international series in engineering and computer science 158.: VLSI, computer architecture and digital signal processing (DE-604)BV023545171 158 |
| spellingShingle | Gebotys, Catherine H. Elmasry, Mohamed I. 1943- Optimal VLSI architectural synthesis area, performance and testability The Kluwer international series in engineering and computer science Architecture des ordinateurs ram Architecture ordinateur Circuitos integrados larpcal Circuits intégrés à très grande échelle Circuits intégrés à très grande échelle ram Ordinateurs - Architecture VLSI Computer architecture Integrated circuits Very large scale integration Computerarchitektur (DE-588)4048717-9 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4048717-9 (DE-588)4264372-7 (DE-588)4117388-0 |
| title | Optimal VLSI architectural synthesis area, performance and testability |
| title_auth | Optimal VLSI architectural synthesis area, performance and testability |
| title_exact_search | Optimal VLSI architectural synthesis area, performance and testability |
| title_full | Optimal VLSI architectural synthesis area, performance and testability Catherine H. Gebotys and Mohamed I. Elmasry |
| title_fullStr | Optimal VLSI architectural synthesis area, performance and testability Catherine H. Gebotys and Mohamed I. Elmasry |
| title_full_unstemmed | Optimal VLSI architectural synthesis area, performance and testability Catherine H. Gebotys and Mohamed I. Elmasry |
| title_short | Optimal VLSI architectural synthesis |
| title_sort | optimal vlsi architectural synthesis area performance and testability |
| title_sub | area, performance and testability |
| topic | Architecture des ordinateurs ram Architecture ordinateur Circuitos integrados larpcal Circuits intégrés à très grande échelle Circuits intégrés à très grande échelle ram Ordinateurs - Architecture VLSI Computer architecture Integrated circuits Very large scale integration Computerarchitektur (DE-588)4048717-9 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Architecture des ordinateurs Architecture ordinateur Circuitos integrados Circuits intégrés à très grande échelle Ordinateurs - Architecture VLSI Computer architecture Integrated circuits Very large scale integration Computerarchitektur Layout Mikroelektronik |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT gebotyscatherineh optimalvlsiarchitecturalsynthesisareaperformanceandtestability AT elmasrymohamedi optimalvlsiarchitecturalsynthesisareaperformanceandtestability |