Verfügbarkeit: Digital Systems testing and testable design

Digital Systems testing and testable design:

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	Abramovici, Miron (VerfasserIn), Breuer, Melvin A. (VerfasserIn), Friedman, Arthur D. (VerfasserIn)
Format:	Buch
Sprache:	English
Veröffentlicht:	New York u.a. Computer Science Pr. 1990
Schriftenreihe:	Electrical engineering, communication and signal proccesing
Schlagworte:	Digital integrated circuits > Design and construction Digital integrated circuits > Testing Computersimulation Digitales System Prüfung Logische Schaltung Fehlererkennung Prüftechnik VLSI Schaltungsentwurf Testbarkeit Digitaltechnik
Beschreibung:	XXI, 653 S.
ISBN:	0716781794

Internformat

MARC


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Datensatz im Suchindex

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author	Abramovici, Miron Breuer, Melvin A. Friedman, Arthur D.
author_facet	Abramovici, Miron Breuer, Melvin A. Friedman, Arthur D.
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bvnumber	BV004626127
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dewey-ones	621 - Applied physics
dewey-raw	621.381/5
dewey-search	621.381/5
dewey-sort	3621.381 15
dewey-tens	620 - Engineering and allied operations
discipline	Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik
format	Book
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id	DE-604.BV004626127
illustrated	Not Illustrated
indexdate	2024-08-01T10:51:01Z
institution	BVB
isbn	0716781794
language	English
oai_aleph_id	oai:aleph.bib-bvb.de:BVB01-002841799
oclc_num	20594770
open_access_boolean
owner	DE-91 DE-BY-TUM DE-92 DE-29T DE-1043 DE-739
owner_facet	DE-91 DE-BY-TUM DE-92 DE-29T DE-1043 DE-739
physical	XXI, 653 S.
publishDate	1990
publishDateSearch	1990
publishDateSort	1990
publisher	Computer Science Pr.
record_format	marc
series2	Electrical engineering, communication and signal proccesing
spellingShingle	Abramovici, Miron Breuer, Melvin A. Friedman, Arthur D. Digital Systems testing and testable design Digital integrated circuits Design and construction Digital integrated circuits Testing Computersimulation (DE-588)4148259-1 gnd Digitales System (DE-588)4012300-5 gnd Prüfung (DE-588)4047609-1 gnd Logische Schaltung (DE-588)4131023-8 gnd Fehlererkennung (DE-588)4133764-5 gnd Prüftechnik (DE-588)4047610-8 gnd VLSI (DE-588)4117388-0 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Testbarkeit (DE-588)4271826-0 gnd Digitaltechnik (DE-588)4012303-0 gnd
subject_GND	(DE-588)4148259-1 (DE-588)4012300-5 (DE-588)4047609-1 (DE-588)4131023-8 (DE-588)4133764-5 (DE-588)4047610-8 (DE-588)4117388-0 (DE-588)4179389-4 (DE-588)4271826-0 (DE-588)4012303-0
title	Digital Systems testing and testable design
title_auth	Digital Systems testing and testable design
title_exact_search	Digital Systems testing and testable design
title_full	Digital Systems testing and testable design Miron Abramovici ; Melvin A. Breuer ; Arthur D. Friedman
title_fullStr	Digital Systems testing and testable design Miron Abramovici ; Melvin A. Breuer ; Arthur D. Friedman
title_full_unstemmed	Digital Systems testing and testable design Miron Abramovici ; Melvin A. Breuer ; Arthur D. Friedman
title_short	Digital Systems testing and testable design
title_sort	digital systems testing and testable design
topic	Digital integrated circuits Design and construction Digital integrated circuits Testing Computersimulation (DE-588)4148259-1 gnd Digitales System (DE-588)4012300-5 gnd Prüfung (DE-588)4047609-1 gnd Logische Schaltung (DE-588)4131023-8 gnd Fehlererkennung (DE-588)4133764-5 gnd Prüftechnik (DE-588)4047610-8 gnd VLSI (DE-588)4117388-0 gnd Schaltungsentwurf (DE-588)4179389-4 gnd Testbarkeit (DE-588)4271826-0 gnd Digitaltechnik (DE-588)4012303-0 gnd
topic_facet	Digital integrated circuits Design and construction Digital integrated circuits Testing Computersimulation Digitales System Prüfung Logische Schaltung Fehlererkennung Prüftechnik VLSI Schaltungsentwurf Testbarkeit Digitaltechnik
work_keys_str_mv	AT abramovicimiron digitalsystemstestingandtestabledesign AT breuermelvina digitalsystemstestingandtestabledesign AT friedmanarthurd digitalsystemstestingandtestabledesign

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