Logischer Entwurf binärer Systeme:
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Buch |
Sprache: | German |
Veröffentlicht: |
Berlin
Verl. Technik
1989
|
Ausgabe: | 3., bearb. Aufl. |
Schlagworte: | |
Beschreibung: | 280 S. graph. Darst. |
ISBN: | 3341005269 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV004117149 | ||
003 | DE-604 | ||
005 | 20241211 | ||
007 | t| | ||
008 | 901009s1989 xx d||| |||| 00||| ger d | ||
020 | |a 3341005269 |9 3-341-00526-9 | ||
035 | |a (OCoLC)75112139 | ||
035 | |a (DE-599)BVBBV004117149 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a ger | |
049 | |a DE-91 |a DE-92 |a DE-739 |a DE-859 |a DE-1046 |a DE-522 |a DE-523 |a DE-634 |a DE-83 |a DE-29T |a DE-B1550 | ||
084 | |a ST 125 |0 (DE-625)143586: |2 rvk | ||
084 | |a ST 130 |0 (DE-625)143588: |2 rvk | ||
084 | |a ZN 5630 |0 (DE-625)157471: |2 rvk | ||
084 | |a ZN 5660 |0 (DE-625)157474: |2 rvk | ||
084 | |a ELT 450f |2 stub | ||
084 | |a DAT 195f |2 stub | ||
100 | 1 | |a Zander, Hans Joachim |d 1933-2024 |e Verfasser |0 (DE-588)115711791 |4 aut | |
245 | 1 | 0 | |a Logischer Entwurf binärer Systeme |c Hans Joachim Zander |
250 | |a 3., bearb. Aufl. | ||
264 | 1 | |a Berlin |b Verl. Technik |c 1989 | |
300 | |a 280 S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 4 | |a Automatentheorie | |
650 | 4 | |a Boolesche Algebra | |
650 | 0 | 7 | |a Binärsignal |0 (DE-588)4145553-8 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Schaltnetz |0 (DE-588)4052053-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Digitaltechnik |0 (DE-588)4012303-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Schaltwerk |0 (DE-588)4052057-2 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Dualsystem |0 (DE-588)4150805-1 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Digitaltechnik |0 (DE-588)4012303-0 |D s |
689 | 0 | |5 DE-604 | |
689 | 1 | 0 | |a Dualsystem |0 (DE-588)4150805-1 |D s |
689 | 1 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
689 | 1 | |5 DE-604 | |
689 | 2 | 0 | |a Digitaltechnik |0 (DE-588)4012303-0 |D s |
689 | 2 | 1 | |a Binärsignal |0 (DE-588)4145553-8 |D s |
689 | 2 | |5 DE-604 | |
689 | 3 | 0 | |a Schaltnetz |0 (DE-588)4052053-5 |D s |
689 | 3 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
689 | 3 | |5 DE-604 | |
689 | 4 | 0 | |a Schaltwerk |0 (DE-588)4052057-2 |D s |
689 | 4 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
689 | 4 | |5 DE-604 | |
943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-002569675 |
Datensatz im Suchindex
DE-BY-FWS_katkey | 82049 |
---|---|
_version_ | 1818201949119447040 |
adam_text | |
any_adam_object | |
author | Zander, Hans Joachim 1933-2024 |
author_GND | (DE-588)115711791 |
author_facet | Zander, Hans Joachim 1933-2024 |
author_role | aut |
author_sort | Zander, Hans Joachim 1933-2024 |
author_variant | h j z hj hjz |
building | Verbundindex |
bvnumber | BV004117149 |
classification_rvk | ST 125 ST 130 ZN 5630 ZN 5660 |
classification_tum | ELT 450f DAT 195f |
ctrlnum | (OCoLC)75112139 (DE-599)BVBBV004117149 |
discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
edition | 3., bearb. Aufl. |
format | Book |
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id | DE-604.BV004117149 |
illustrated | Illustrated |
indexdate | 2024-12-12T04:01:40Z |
institution | BVB |
isbn | 3341005269 |
language | German |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-002569675 |
oclc_num | 75112139 |
open_access_boolean | |
owner | DE-91 DE-BY-TUM DE-92 DE-739 DE-859 DE-1046 DE-522 DE-523 DE-634 DE-83 DE-29T DE-B1550 |
owner_facet | DE-91 DE-BY-TUM DE-92 DE-739 DE-859 DE-1046 DE-522 DE-523 DE-634 DE-83 DE-29T DE-B1550 |
physical | 280 S. graph. Darst. |
publishDate | 1989 |
publishDateSearch | 1989 |
publishDateSort | 1989 |
publisher | Verl. Technik |
record_format | marc |
spellingShingle | Zander, Hans Joachim 1933-2024 Logischer Entwurf binärer Systeme Automatentheorie Boolesche Algebra Binärsignal (DE-588)4145553-8 gnd Schaltnetz (DE-588)4052053-5 gnd Logischer Entwurf (DE-588)4168051-0 gnd Digitaltechnik (DE-588)4012303-0 gnd Schaltwerk (DE-588)4052057-2 gnd Dualsystem (DE-588)4150805-1 gnd |
subject_GND | (DE-588)4145553-8 (DE-588)4052053-5 (DE-588)4168051-0 (DE-588)4012303-0 (DE-588)4052057-2 (DE-588)4150805-1 |
title | Logischer Entwurf binärer Systeme |
title_auth | Logischer Entwurf binärer Systeme |
title_exact_search | Logischer Entwurf binärer Systeme |
title_full | Logischer Entwurf binärer Systeme Hans Joachim Zander |
title_fullStr | Logischer Entwurf binärer Systeme Hans Joachim Zander |
title_full_unstemmed | Logischer Entwurf binärer Systeme Hans Joachim Zander |
title_short | Logischer Entwurf binärer Systeme |
title_sort | logischer entwurf binarer systeme |
topic | Automatentheorie Boolesche Algebra Binärsignal (DE-588)4145553-8 gnd Schaltnetz (DE-588)4052053-5 gnd Logischer Entwurf (DE-588)4168051-0 gnd Digitaltechnik (DE-588)4012303-0 gnd Schaltwerk (DE-588)4052057-2 gnd Dualsystem (DE-588)4150805-1 gnd |
topic_facet | Automatentheorie Boolesche Algebra Binärsignal Schaltnetz Logischer Entwurf Digitaltechnik Schaltwerk Dualsystem |
work_keys_str_mv | AT zanderhansjoachim logischerentwurfbinarersysteme |
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