Advanced simulation and test methodologies for VLSI design:
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
London
Van Nostrand
1989
|
| Edition: | 1. publ. |
| Subjects: | |
| Item Description: | Literaturangaben |
| Physical Description: | XI, 378 S.: graph. Darst. |
| ISBN: | 0747600015 |
Staff View
MARC
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Record in the Search Index
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| author | Russell, Gordon 1892-1980 Sayers, Ian L. |
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| bvnumber | BV002646449 |
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| classification_rvk | ST 190 |
| classification_tum | ELT 355f |
| ctrlnum | (OCoLC)18324970 (DE-599)BVBBV002646449 |
| dewey-full | 621.381/73 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381/73 |
| dewey-search | 621.381/73 |
| dewey-sort | 3621.381 273 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 1. publ. |
| format | Book |
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| id | DE-604.BV002646449 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T15:47:51Z |
| institution | BVB |
| isbn | 0747600015 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001698005 |
| oclc_num | 18324970 |
| open_access_boolean | |
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| physical | XI, 378 S.: graph. Darst. |
| publishDate | 1989 |
| publishDateSearch | 1989 |
| publishDateSort | 1989 |
| publisher | Van Nostrand |
| record_format | marc |
| spelling | Russell, Gordon 1892-1980 Verfasser (DE-588)12155483X aut Advanced simulation and test methodologies for VLSI design Gordon Russell and Ian L. Sayers 1. publ. London Van Nostrand 1989 XI, 378 S.: graph. Darst. txt rdacontent n rdamedia nc rdacarrier Literaturangaben Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Essais ram Conception VLSI Simulation Simulation, Méthodes de ram Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods Prüftechnik (DE-588)4047610-8 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Prüftechnik (DE-588)4047610-8 s DE-604 Schaltungsentwurf (DE-588)4179389-4 s 1\p DE-604 Sayers, Ian L. Verfasser aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Russell, Gordon 1892-1980 Sayers, Ian L. Advanced simulation and test methodologies for VLSI design Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Essais ram Conception VLSI Simulation Simulation, Méthodes de ram Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods Prüftechnik (DE-588)4047610-8 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4047610-8 (DE-588)4179389-4 (DE-588)4117388-0 |
| title | Advanced simulation and test methodologies for VLSI design |
| title_auth | Advanced simulation and test methodologies for VLSI design |
| title_exact_search | Advanced simulation and test methodologies for VLSI design |
| title_full | Advanced simulation and test methodologies for VLSI design Gordon Russell and Ian L. Sayers |
| title_fullStr | Advanced simulation and test methodologies for VLSI design Gordon Russell and Ian L. Sayers |
| title_full_unstemmed | Advanced simulation and test methodologies for VLSI design Gordon Russell and Ian L. Sayers |
| title_short | Advanced simulation and test methodologies for VLSI design |
| title_sort | advanced simulation and test methodologies for vlsi design |
| topic | Circuits intégrés à très grande échelle - Conception et construction ram Circuits intégrés à très grande échelle - Essais ram Conception VLSI Simulation Simulation, Méthodes de ram Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods Prüftechnik (DE-588)4047610-8 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Conception et construction Circuits intégrés à très grande échelle - Essais Conception VLSI Simulation Simulation, Méthodes de Test VLSI Integrated circuits Very large scale integration Design and construction Simulation methods Prüftechnik Schaltungsentwurf VLSI |
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