Logical design of electrical circuits: With a table of four-relay circuits by Edward F. Moore
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
New York
McGraw-Hill
1958
|
| Subjects: | |
| Physical Description: | IX, 220 S. zahlr. graph. Darst. |
Staff View
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV002283928 | ||
| 003 | DE-604 | ||
| 005 | 20020913 | ||
| 007 | t | ||
| 008 | 890928s1958 d||| |||| 00||| eng d | ||
| 035 | |a (OCoLC)174304710 | ||
| 035 | |a (DE-599)BVBBV002283928 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91 | ||
| 100 | 1 | |a Higonnet, René A. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Logical design of electrical circuits |b With a table of four-relay circuits by Edward F. Moore |c René A. Higonnet ; René A. Gréa* |
| 264 | 1 | |a New York |b McGraw-Hill |c 1958 | |
| 300 | |a IX, 220 S. |b zahlr. graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 700 | 1 | |a Gréa, René A. |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-001500976 | ||
Record in the Search Index
| _version_ | 1804116743087456256 |
|---|---|
| any_adam_object | |
| author | Higonnet, René A. Gréa, René A. |
| author_facet | Higonnet, René A. Gréa, René A. |
| author_role | aut aut |
| author_sort | Higonnet, René A. |
| author_variant | r a h ra rah r a g ra rag |
| building | Verbundindex |
| bvnumber | BV002283928 |
| ctrlnum | (OCoLC)174304710 (DE-599)BVBBV002283928 |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00945nam a2200289 c 4500</leader><controlfield tag="001">BV002283928</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20020913 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">890928s1958 d||| |||| 00||| eng d</controlfield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)174304710</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV002283928</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Higonnet, René A.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Logical design of electrical circuits</subfield><subfield code="b">With a table of four-relay circuits by Edward F. Moore</subfield><subfield code="c">René A. Higonnet ; René A. Gréa*</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York</subfield><subfield code="b">McGraw-Hill</subfield><subfield code="c">1958</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">IX, 220 S.</subfield><subfield code="b">zahlr. graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Logischer Entwurf</subfield><subfield code="0">(DE-588)4168051-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gréa, René A.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-001500976</subfield></datafield></record></collection> |
| id | DE-604.BV002283928 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:43:21Z |
| institution | BVB |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001500976 |
| oclc_num | 174304710 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM |
| owner_facet | DE-91 DE-BY-TUM |
| physical | IX, 220 S. zahlr. graph. Darst. |
| publishDate | 1958 |
| publishDateSearch | 1958 |
| publishDateSort | 1958 |
| publisher | McGraw-Hill |
| record_format | marc |
| spelling | Higonnet, René A. Verfasser aut Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore René A. Higonnet ; René A. Gréa* New York McGraw-Hill 1958 IX, 220 S. zahlr. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 s DE-604 Gréa, René A. Verfasser aut |
| spellingShingle | Higonnet, René A. Gréa, René A. Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore Logischer Entwurf (DE-588)4168051-0 gnd |
| subject_GND | (DE-588)4168051-0 |
| title | Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore |
| title_auth | Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore |
| title_exact_search | Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore |
| title_full | Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore René A. Higonnet ; René A. Gréa* |
| title_fullStr | Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore René A. Higonnet ; René A. Gréa* |
| title_full_unstemmed | Logical design of electrical circuits With a table of four-relay circuits by Edward F. Moore René A. Higonnet ; René A. Gréa* |
| title_short | Logical design of electrical circuits |
| title_sort | logical design of electrical circuits with a table of four relay circuits by edward f moore |
| title_sub | With a table of four-relay circuits by Edward F. Moore |
| topic | Logischer Entwurf (DE-588)4168051-0 gnd |
| topic_facet | Logischer Entwurf |
| work_keys_str_mv | AT higonnetrenea logicaldesignofelectricalcircuitswithatableoffourrelaycircuitsbyedwardfmoore AT grearenea logicaldesignofelectricalcircuitswithatableoffourrelaycircuitsbyedwardfmoore |