VLSI signal processing: a bit-serial approach
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Wokingham, England
Addison-Wesley
1985
|
| Schriftenreihe: | Microelectronics systems design series.
|
| Schlagworte: | |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XV, 312 S. Ill., graph. Darst. |
| ISBN: | 0201144042 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV002051286 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | t | ||
| 008 | 890928s1985 ad|| |||| 00||| eng d | ||
| 020 | |a 0201144042 |9 0-201-14404-2 | ||
| 035 | |a (OCoLC)490179387 | ||
| 035 | |a (DE-599)BVBBV002051286 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91 | ||
| 050 | 0 | |a TK7874 | |
| 082 | 0 | |a 621.38/0433 |2 19 | |
| 084 | |a ELT 515f |2 stub | ||
| 084 | |a ELT 355f |2 stub | ||
| 100 | 1 | |a Denyer, Peter |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a VLSI signal processing |b a bit-serial approach |c Peter Denyer ; David Renshaw* |
| 264 | 1 | |a Wokingham, England |b Addison-Wesley |c 1985 | |
| 300 | |a XV, 312 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Microelectronics systems design series. | |
| 500 | |a Literaturangaben | ||
| 650 | 7 | |a Circuits intégrés à très grande échelle - Conception et construction |2 ram | |
| 650 | 7 | |a Traitement du signal - Techniques numériques |2 ram | |
| 650 | 7 | |a VLSI |2 inriac | |
| 650 | 7 | |a architecture VLSI |2 inriac | |
| 650 | 7 | |a circuit intégré |2 inriac | |
| 650 | 7 | |a conception circuit |2 inriac | |
| 650 | 7 | |a traitement signal |2 inriac | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 4 | |a Signal processing |x Digital techniques | |
| 650 | 0 | 7 | |a Digitalschaltung |0 (DE-588)4012295-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Signalverarbeitung |0 (DE-588)4054947-1 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a Signalverarbeitung |0 (DE-588)4054947-1 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Digitalschaltung |0 (DE-588)4012295-5 |D s |
| 689 | 1 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a Renshaw, David |e Verfasser |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-001341368 | ||
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
Datensatz im Suchindex
| _version_ | 1804116501287927808 |
|---|---|
| any_adam_object | |
| author | Denyer, Peter Renshaw, David |
| author_facet | Denyer, Peter Renshaw, David |
| author_role | aut aut |
| author_sort | Denyer, Peter |
| author_variant | p d pd d r dr |
| building | Verbundindex |
| bvnumber | BV002051286 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_tum | ELT 515f ELT 355f |
| ctrlnum | (OCoLC)490179387 (DE-599)BVBBV002051286 |
| dewey-full | 621.38/0433 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.38/0433 |
| dewey-search | 621.38/0433 |
| dewey-sort | 3621.38 3433 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01986nam a2200553 c 4500</leader><controlfield tag="001">BV002051286</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">890928s1985 ad|| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0201144042</subfield><subfield code="9">0-201-14404-2</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)490179387</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV002051286</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.38/0433</subfield><subfield code="2">19</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 515f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 355f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Denyer, Peter</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">VLSI signal processing</subfield><subfield code="b">a bit-serial approach</subfield><subfield code="c">Peter Denyer ; David Renshaw*</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Wokingham, England</subfield><subfield code="b">Addison-Wesley</subfield><subfield code="c">1985</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XV, 312 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Microelectronics systems design series.</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Literaturangaben</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Traitement du signal - Techniques numériques</subfield><subfield code="2">ram</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">VLSI</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">architecture VLSI</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">circuit intégré</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">conception circuit</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">traitement signal</subfield><subfield code="2">inriac</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Signal processing</subfield><subfield code="x">Digital techniques</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitalschaltung</subfield><subfield code="0">(DE-588)4012295-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Signalverarbeitung</subfield><subfield code="0">(DE-588)4054947-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Signalverarbeitung</subfield><subfield code="0">(DE-588)4054947-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Digitalschaltung</subfield><subfield code="0">(DE-588)4012295-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Renshaw, David</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-001341368</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield></record></collection> |
| id | DE-604.BV002051286 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:39:31Z |
| institution | BVB |
| isbn | 0201144042 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001341368 |
| oclc_num | 490179387 |
| open_access_boolean | |
| owner | DE-91 DE-BY-TUM |
| owner_facet | DE-91 DE-BY-TUM |
| physical | XV, 312 S. Ill., graph. Darst. |
| publishDate | 1985 |
| publishDateSearch | 1985 |
| publishDateSort | 1985 |
| publisher | Addison-Wesley |
| record_format | marc |
| series2 | Microelectronics systems design series. |
| spelling | Denyer, Peter Verfasser aut VLSI signal processing a bit-serial approach Peter Denyer ; David Renshaw* Wokingham, England Addison-Wesley 1985 XV, 312 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Microelectronics systems design series. Literaturangaben Circuits intégrés à très grande échelle - Conception et construction ram Traitement du signal - Techniques numériques ram VLSI inriac architecture VLSI inriac circuit intégré inriac conception circuit inriac traitement signal inriac Integrated circuits Very large scale integration Design and construction Signal processing Digital techniques Digitalschaltung (DE-588)4012295-5 gnd rswk-swf Signalverarbeitung (DE-588)4054947-1 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Signalverarbeitung (DE-588)4054947-1 s DE-604 Digitalschaltung (DE-588)4012295-5 s 1\p DE-604 Renshaw, David Verfasser aut 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Denyer, Peter Renshaw, David VLSI signal processing a bit-serial approach Circuits intégrés à très grande échelle - Conception et construction ram Traitement du signal - Techniques numériques ram VLSI inriac architecture VLSI inriac circuit intégré inriac conception circuit inriac traitement signal inriac Integrated circuits Very large scale integration Design and construction Signal processing Digital techniques Digitalschaltung (DE-588)4012295-5 gnd Signalverarbeitung (DE-588)4054947-1 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4012295-5 (DE-588)4054947-1 (DE-588)4117388-0 |
| title | VLSI signal processing a bit-serial approach |
| title_auth | VLSI signal processing a bit-serial approach |
| title_exact_search | VLSI signal processing a bit-serial approach |
| title_full | VLSI signal processing a bit-serial approach Peter Denyer ; David Renshaw* |
| title_fullStr | VLSI signal processing a bit-serial approach Peter Denyer ; David Renshaw* |
| title_full_unstemmed | VLSI signal processing a bit-serial approach Peter Denyer ; David Renshaw* |
| title_short | VLSI signal processing |
| title_sort | vlsi signal processing a bit serial approach |
| title_sub | a bit-serial approach |
| topic | Circuits intégrés à très grande échelle - Conception et construction ram Traitement du signal - Techniques numériques ram VLSI inriac architecture VLSI inriac circuit intégré inriac conception circuit inriac traitement signal inriac Integrated circuits Very large scale integration Design and construction Signal processing Digital techniques Digitalschaltung (DE-588)4012295-5 gnd Signalverarbeitung (DE-588)4054947-1 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Conception et construction Traitement du signal - Techniques numériques VLSI architecture VLSI circuit intégré conception circuit traitement signal Integrated circuits Very large scale integration Design and construction Signal processing Digital techniques Digitalschaltung Signalverarbeitung |
| work_keys_str_mv | AT denyerpeter vlsisignalprocessingabitserialapproach AT renshawdavid vlsisignalprocessingabitserialapproach |