Electromigration inside logic cells modeling, analyzing and mitigating signal electromigration in NanoCMOS von Posser, Gracieli, Sapatnekar, Sachin S., Reis, Ricardo

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Thermally-aware design von Zhan, Yong, Kumar, Sanjay V., Sapatnekar, Sachin S.

Timing von Sapatnekar, Sachin

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Design automation for timing driven layout synthesis von Sapatnekar, Sachin S., Kang, Sung-Mo S.

Design Automation for Timing-Driven Layout Synthesis von Sapatnekar, Sachin S., Kang, Sung-Mo

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Proceedings of the 47th Design Automation Conference von Sapatnekar, Sachin

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Designing digital computer systems with Verilog von Lilja, David J., Sapatnekar, Sachin S.

Proceedings of the 2002 international symposium on Physical design von Sapatnekar, Sachin

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Proceedings of the 2001 international symposium on Physical design von Sapatnekar, Sachin

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Timing analysis and optimization of sequential circuits von Maheshwari, Naresh, Sapatnekar, Sachin S.

Timing Analysis and Optimization of Sequential Circuits von Maheshwari, Naresh, Sapatnekar, Sachin S.

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