Multilevel interconnect technology:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York, NY [u.a.]
MacGraw-Hill
1993
|
| Schriftenreihe: | Intel
|
| Schlagworte: | |
| Beschreibung: | XV, 224 S. Ill., graph. Darst. |
| ISBN: | 0070512248 |
Internformat
MARC
| LEADER | 00000nam a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV023807360 | ||
| 003 | DE-604 | ||
| 005 | 20120924 | ||
| 007 | t | ||
| 008 | 931214s1993 ad|| |||| 00||| eng d | ||
| 020 | |a 0070512248 |9 0-07-051224-8 | ||
| 035 | |a (OCoLC)831402581 | ||
| 035 | |a (DE-599)BVBBV023807360 | ||
| 040 | |a DE-604 |b ger | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-634 | ||
| 082 | 0 | |a 621.395 | |
| 100 | 1 | |a Rao, Gopal K. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Multilevel interconnect technology |c Gopal K. Rao |
| 264 | 1 | |a New York, NY [u.a.] |b MacGraw-Hill |c 1993 | |
| 300 | |a XV, 224 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Intel | |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Fertigung |0 (DE-588)4016899-2 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Integrierte Schaltung |0 (DE-588)4027242-4 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Integrierte Schaltung |0 (DE-588)4027242-4 |D s |
| 689 | 0 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
| 689 | 0 | 2 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 3 | |a Fertigung |0 (DE-588)4016899-2 |D s |
| 689 | 0 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-017449530 | ||
Datensatz im Suchindex
| _version_ | 1804139007449235456 |
|---|---|
| any_adam_object | |
| author | Rao, Gopal K. |
| author_facet | Rao, Gopal K. |
| author_role | aut |
| author_sort | Rao, Gopal K. |
| author_variant | g k r gk gkr |
| building | Verbundindex |
| bvnumber | BV023807360 |
| ctrlnum | (OCoLC)831402581 (DE-599)BVBBV023807360 |
| dewey-full | 621.395 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01220nam a2200385zc 4500</leader><controlfield tag="001">BV023807360</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20120924 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">931214s1993 ad|| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0070512248</subfield><subfield code="9">0-07-051224-8</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)831402581</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV023807360</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.395</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Rao, Gopal K.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Multilevel interconnect technology</subfield><subfield code="c">Gopal K. Rao</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York, NY [u.a.]</subfield><subfield code="b">MacGraw-Hill</subfield><subfield code="c">1993</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XV, 224 S.</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">Intel</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Fertigung</subfield><subfield code="0">(DE-588)4016899-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Integrierte Schaltung</subfield><subfield code="0">(DE-588)4027242-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Integrierte Schaltung</subfield><subfield code="0">(DE-588)4027242-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="3"><subfield code="a">Fertigung</subfield><subfield code="0">(DE-588)4016899-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-017449530</subfield></datafield></record></collection> |
| id | DE-604.BV023807360 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T21:37:14Z |
| institution | BVB |
| isbn | 0070512248 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-017449530 |
| oclc_num | 831402581 |
| open_access_boolean | |
| owner | DE-634 |
| owner_facet | DE-634 |
| physical | XV, 224 S. Ill., graph. Darst. |
| publishDate | 1993 |
| publishDateSearch | 1993 |
| publishDateSort | 1993 |
| publisher | MacGraw-Hill |
| record_format | marc |
| series2 | Intel |
| spelling | Rao, Gopal K. Verfasser aut Multilevel interconnect technology Gopal K. Rao New York, NY [u.a.] MacGraw-Hill 1993 XV, 224 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Intel VLSI (DE-588)4117388-0 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Fertigung (DE-588)4016899-2 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 s Entwurf (DE-588)4121208-3 s VLSI (DE-588)4117388-0 s Fertigung (DE-588)4016899-2 s DE-604 |
| spellingShingle | Rao, Gopal K. Multilevel interconnect technology VLSI (DE-588)4117388-0 gnd Entwurf (DE-588)4121208-3 gnd Fertigung (DE-588)4016899-2 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4121208-3 (DE-588)4016899-2 (DE-588)4027242-4 |
| title | Multilevel interconnect technology |
| title_auth | Multilevel interconnect technology |
| title_exact_search | Multilevel interconnect technology |
| title_full | Multilevel interconnect technology Gopal K. Rao |
| title_fullStr | Multilevel interconnect technology Gopal K. Rao |
| title_full_unstemmed | Multilevel interconnect technology Gopal K. Rao |
| title_short | Multilevel interconnect technology |
| title_sort | multilevel interconnect technology |
| topic | VLSI (DE-588)4117388-0 gnd Entwurf (DE-588)4121208-3 gnd Fertigung (DE-588)4016899-2 gnd Integrierte Schaltung (DE-588)4027242-4 gnd |
| topic_facet | VLSI Entwurf Fertigung Integrierte Schaltung |
| work_keys_str_mv | AT raogopalk multilevelinterconnecttechnology |