High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
New Delhi
Springer
[2016]
|
Schriftenreihe: | Springer series in advanced microelectronics
volume 51 (2016) |
Schlagworte: | |
Online-Zugang: | DE-634 DE-1043 DE-1046 DE-Aug4 DE-573 DE-92 DE-898 DE-859 DE-861 DE-863 DE-862 DE-706 Volltext Inhaltsverzeichnis Abstract |
Beschreibung: | 1 Online Ressource (XVII, 114 p. 56 illus) |
ISBN: | 9788132225201 |
DOI: | 10.1007/978-81-322-2520-1 |
Internformat
MARC
LEADER | 00000nam a2200000zcb4500 | ||
---|---|---|---|
001 | BV043211995 | ||
003 | DE-604 | ||
005 | 20160928 | ||
007 | cr|uuu---uuuuu | ||
008 | 151215s2016 xx o|||| 00||| eng d | ||
020 | |a 9788132225201 |c Online |9 978-81-322-2520-1 | ||
024 | 7 | |a 10.1007/978-81-322-2520-1 |2 doi | |
035 | |a (OCoLC)916039693 | ||
035 | |a (DE-599)BVBBV043211995 | ||
040 | |a DE-604 |b ger |e rda | ||
041 | 0 | |a eng | |
049 | |a DE-1043 |a DE-Aug4 |a DE-573 |a DE-859 |a DE-863 |a DE-92 |a DE-862 |a DE-898 |a DE-634 |a DE-1046 |a DE-861 |a DE-706 | ||
082 | 0 | |a 621.3815 |2 23 | |
100 | 1 | |a Palchaudhuri, Ayan |e Verfasser |4 aut | |
245 | 1 | 0 | |a High performance integer arithmetic circuit design on FPGA |b architecture, implementation and design automation |c Ayan Palchaudhuri, Rajat Subhra Chakraborty |
264 | 1 | |a New Delhi |b Springer |c [2016] | |
264 | 4 | |c © 2016 | |
300 | |a 1 Online Ressource (XVII, 114 p. 56 illus) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 1 | |a Springer series in advanced microelectronics |v volume 51 (2016) | |
650 | 4 | |a Engineering | |
650 | 4 | |a Logic design | |
650 | 4 | |a Electronics | |
650 | 4 | |a Microelectronics | |
650 | 4 | |a Electronic circuits | |
650 | 4 | |a Circuits and Systems | |
650 | 4 | |a Electronics and Microelectronics, Instrumentation | |
650 | 4 | |a Logic Design | |
650 | 4 | |a Ingenieurwissenschaften | |
700 | 1 | |a Chakraborty, Rajat Subhra |e Sonstige |0 (DE-588)1060239728 |4 oth | |
776 | 0 | 8 | |i Erscheint auch als |n Druckausgabe |z 978-81-322-2519-5 |
830 | 0 | |a Springer series in advanced microelectronics |v volume 51 (2016) |w (DE-604)BV041461435 |9 51 | |
856 | 4 | 0 | |u https://doi.org/10.1007/978-81-322-2520-1 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
856 | 4 | 2 | |m Springer Fremddatenuebernahme |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028635133&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
856 | 4 | 2 | |m Springer Fremddatenuebernahme |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028635133&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |3 Abstract |
912 | |a ZDB-2-ENG | ||
940 | 1 | |q ZDB-2-ENG_2016 | |
943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-028635133 | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-634 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-1043 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-1046 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-Aug4 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-573 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-92 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-898 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-859 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-861 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-863 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-862 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-81-322-2520-1 |l DE-706 |p ZDB-2-ENG |x Verlag |3 Volltext |
Datensatz im Suchindex
DE-BY-FWS_katkey | 590990 |
---|---|
_version_ | 1819742194367463424 |
adam_text |
HIGH PERFORMANCE INTEGER ARITHMETIC CIRCUIT DESIGN ON FPGA
/ PALCHAUDHURI, AYAN
: 2016
TABLE OF CONTENTS / INHALTSVERZEICHNIS
INTRODUCTION
ARCHITECTURE OF TARGET FPGA PLATFORM
A FABRIC COMPONENT BASED DESIGN APPROACH FOR HIGH PERFORMANCE INTEGER
ARITHMETIC CIRCUITS
ARCHITECTURE OF DATA PATH CIRCUITS
ARCHITECTURE OF CONTROL PATH CIRCUITS
COMPACT FPGA IMPLEMENTATION OF LINEAR CELLULAR AUTOMATA
DESIGN AUTOMATION AND CASE STUDIES
CONCLUSIONS AND FUTURE WORK
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
HIGH PERFORMANCE INTEGER ARITHMETIC CIRCUIT DESIGN ON FPGA
/ PALCHAUDHURI, AYAN
: 2016
ABSTRACT / INHALTSTEXT
THIS BOOK DESCRIBES THE OPTIMIZED IMPLEMENTATIONS OF SEVERAL ARITHMETIC
DATAPATH, CONTROLPATH AND PSEUDORANDOM SEQUENCE GENERATOR CIRCUITS FOR
REALIZATION OF HIGH PERFORMANCE ARITHMETIC CIRCUITS TARGETED TOWARDS A
SPECIFIC FAMILY OF THE HIGH-END FIELD PROGRAMMABLE GATE ARRAYS (FPGAS).
IT EXPLORES REGULAR, MODULAR, CASCADABLE, AND BIT-SLICED ARCHITECTURES
OF THESE CIRCUITS, BY DIRECTLY INSTANTIATING THE TARGET FPGA-SPECIFIC
PRIMITIVES IN THE HDL. EVERY PROPOSED ARCHITECTURE IS JUSTIFIED WITH
DETAILED MATHEMATICAL ANALYSES. SIMULTANEOUSLY, CONSTRAINED PLACEMENT OF
THE CIRCUIT BUILDING BLOCKS IS PERFORMED, BY PLACING THE LOGICALLY
RELATED HARDWARE PRIMITIVES IN CLOSE PROXIMITY TO ONE ANOTHER BY
SUPPLYING RELEVANT PLACEMENT CONSTRAINTS IN THE XILINX PROPRIETARY
“USER CONSTRAINTS FILE”. THE BOOK COVERS THE IMPLEMENTATION OF A
GUI-BASED CAD TOOL NAMED FLEXICORE INTEGRATED WITH THE XILINX INTEGRATED
SOFTWARE ENVIRONMENT (ISE) FOR DESIGN AUTOMATION OF PLATFORM-SPECIFIC
HIGH-PERFORMANCE ARITHMETIC CIRCUITS FROM USER-LEVEL SPECIFICATIONS.
THIS TOOL HAS BEEN USED TO IMPLEMENT THE PROPOSED CIRCUITS, AS WELL AS
HARDWARE IMPLEMENTATIONS OF INTEGER ARITHMETIC ALGORITHMS WHERE SEVERAL
OF THE PROPOSED CIRCUITS ARE USED AS BUILDING BLOCKS. IMPLEMENTATION
RESULTS DEMONSTRATE HIGHER PERFORMANCE AND SUPERIOR OPERAND-WIDTH
SCALABILITY FOR THE PROPOSED CIRCUITS, WITH RESPECT TO IMPLEMENTATIONS
DERIVED THROUGH OTHER EXISTING APPROACHES. THIS BOOK WILL PROVE USEFUL
TO RESEARCHERS, STUDENTS, AND PROFESSIONALS ENGAGED IN THE DOMAIN OF
FPGA CIRCUIT OPTIMIZATION AND IMPLEMENTATION
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT. |
any_adam_object | 1 |
author | Palchaudhuri, Ayan |
author_GND | (DE-588)1060239728 |
author_facet | Palchaudhuri, Ayan |
author_role | aut |
author_sort | Palchaudhuri, Ayan |
author_variant | a p ap |
building | Verbundindex |
bvnumber | BV043211995 |
collection | ZDB-2-ENG |
ctrlnum | (OCoLC)916039693 (DE-599)BVBBV043211995 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-81-322-2520-1 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000zcb4500</leader><controlfield tag="001">BV043211995</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20160928</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">151215s2016 xx o|||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9788132225201</subfield><subfield code="c">Online</subfield><subfield code="9">978-81-322-2520-1</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-81-322-2520-1</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)916039693</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV043211995</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-1043</subfield><subfield code="a">DE-Aug4</subfield><subfield code="a">DE-573</subfield><subfield code="a">DE-859</subfield><subfield code="a">DE-863</subfield><subfield code="a">DE-92</subfield><subfield code="a">DE-862</subfield><subfield code="a">DE-898</subfield><subfield code="a">DE-634</subfield><subfield code="a">DE-1046</subfield><subfield code="a">DE-861</subfield><subfield code="a">DE-706</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Palchaudhuri, Ayan</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">High performance integer arithmetic circuit design on FPGA</subfield><subfield code="b">architecture, implementation and design automation</subfield><subfield code="c">Ayan Palchaudhuri, Rajat Subhra Chakraborty</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New Delhi</subfield><subfield code="b">Springer</subfield><subfield code="c">[2016]</subfield></datafield><datafield tag="264" ind1=" " ind2="4"><subfield code="c">© 2016</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online Ressource (XVII, 114 p. 56 illus)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Springer series in advanced microelectronics</subfield><subfield code="v">volume 51 (2016)</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Microelectronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics and Microelectronics, Instrumentation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Logic Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ingenieurwissenschaften</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Chakraborty, Rajat Subhra</subfield><subfield code="e">Sonstige</subfield><subfield code="0">(DE-588)1060239728</subfield><subfield code="4">oth</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druckausgabe</subfield><subfield code="z">978-81-322-2519-5</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Springer series in advanced microelectronics</subfield><subfield code="v">volume 51 (2016)</subfield><subfield code="w">(DE-604)BV041461435</subfield><subfield code="9">51</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">Springer Fremddatenuebernahme</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028635133&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">Springer Fremddatenuebernahme</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028635133&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Abstract</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_2016</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-028635133</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-634</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-1043</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-1046</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-Aug4</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-573</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-92</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-898</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-859</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-861</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-863</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-862</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-81-322-2520-1</subfield><subfield code="l">DE-706</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV043211995 |
illustrated | Not Illustrated |
indexdate | 2024-12-29T04:03:12Z |
institution | BVB |
isbn | 9788132225201 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028635133 |
oclc_num | 916039693 |
open_access_boolean | |
owner | DE-1043 DE-Aug4 DE-573 DE-859 DE-863 DE-BY-FWS DE-92 DE-862 DE-BY-FWS DE-898 DE-BY-UBR DE-634 DE-1046 DE-861 DE-706 |
owner_facet | DE-1043 DE-Aug4 DE-573 DE-859 DE-863 DE-BY-FWS DE-92 DE-862 DE-BY-FWS DE-898 DE-BY-UBR DE-634 DE-1046 DE-861 DE-706 |
physical | 1 Online Ressource (XVII, 114 p. 56 illus) |
psigel | ZDB-2-ENG ZDB-2-ENG_2016 |
publishDate | 2016 |
publishDateSearch | 2016 |
publishDateSort | 2016 |
publisher | Springer |
record_format | marc |
series | Springer series in advanced microelectronics |
series2 | Springer series in advanced microelectronics |
spellingShingle | Palchaudhuri, Ayan High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation Springer series in advanced microelectronics Engineering Logic design Electronics Microelectronics Electronic circuits Circuits and Systems Electronics and Microelectronics, Instrumentation Logic Design Ingenieurwissenschaften |
title | High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation |
title_auth | High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation |
title_exact_search | High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation |
title_full | High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation Ayan Palchaudhuri, Rajat Subhra Chakraborty |
title_fullStr | High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation Ayan Palchaudhuri, Rajat Subhra Chakraborty |
title_full_unstemmed | High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation Ayan Palchaudhuri, Rajat Subhra Chakraborty |
title_short | High performance integer arithmetic circuit design on FPGA |
title_sort | high performance integer arithmetic circuit design on fpga architecture implementation and design automation |
title_sub | architecture, implementation and design automation |
topic | Engineering Logic design Electronics Microelectronics Electronic circuits Circuits and Systems Electronics and Microelectronics, Instrumentation Logic Design Ingenieurwissenschaften |
topic_facet | Engineering Logic design Electronics Microelectronics Electronic circuits Circuits and Systems Electronics and Microelectronics, Instrumentation Logic Design Ingenieurwissenschaften |
url | https://doi.org/10.1007/978-81-322-2520-1 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028635133&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028635133&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |
volume_link | (DE-604)BV041461435 |
work_keys_str_mv | AT palchaudhuriayan highperformanceintegerarithmeticcircuitdesignonfpgaarchitectureimplementationanddesignautomation AT chakrabortyrajatsubhra highperformanceintegerarithmeticcircuitdesignonfpgaarchitectureimplementationanddesignautomation |