Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits.:
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Schriftenreihe: | Science for systems
54 |
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Beschreibung: | IV, 141 Seiten Illustrationen 21 cm x 14.8 cm |
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245 | 1 | 0 | |a Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. |c Stefan Mönch |
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264 | 1 | |a Stuttgart |b Fraunhofer Verlag |c 2022 | |
300 | |a IV, 141 Seiten |b Illustrationen |c 21 cm x 14.8 cm | ||
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Datensatz im Suchindex
_version_ | 1804184508754296832 |
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adam_text | CONTENTS
EXECUTIVE
SUMMARY
I
ZUSAMMENFASSUNG
III
1
INTRODUCTION
1
1.1
BACKGROUND
.......................................................................................................
1
1.2
STATE
OF
THE
ART
................................................................................................
2
1.3
PROBLEM
.............................................................................................................
3
1.4
SCOPE
OF
THE
WORK
.........................................................................................
4
1.5
RESEARCH
QUESTIONS
..........................................................................................
6
1.6
STRUCTURE
OF
THE
THESIS
...................................................................................
7
2
SUBSTRATE-RELATED
SWITCHING
CHARACTERISTICS
OF
GAN-ON-SI
HALF-BRIDGES
9
2.1
PROBLEM
AND
APPROACH
...................................................................................
9
2.2
CAPACITANCES
OF
INDIVIDUAL
TRANSISTORS
.........................................................
11
2.2.1
TERMINAL
CAPACITANCES
OF
THREE
AND
FOUR-TERMINAL
HEMTS
.
.
11
2.2.2
EFFECTIVE
CAPACITANCES
.....................................................................
12
2.2.3
NON-LINEAR
MULTI-BIAS
CAPACITANCES
..............................................
13
2.2.4
CONDENSED
CAPACITANCES-RELATED
QUANTITIES
AT
NOMINAL
OPERATION
VOLTAGE
...........................................................................
15
2.3
LIMITED
OPERATION
VOLTAGE
FROM
SUBSTRATE
BIASING
...............................
16
2.4
ANALYZED
HALF-BRIDGE
SUBSTRATE
TERMINATIONS
............................................
19
2.5
SUBSTRATE
VOLTAGE
ANALYSIS
............................................................................
20
2.5.1
SUBSTRATE-TO-SOURCE
VOLTAGE
CALCULATION
FOR
FIXED
SUBSTRATE
TERMINATIONS
.....................................................................................
20
2.5.2
SUBSTRATE-TO-SOURCE
VOLTAGE
CALCULATION
FOR
FLOATING
SUBSTRATE
TERMINATIONS
.....................................................................................
22
2.5.2.1
SEPARATELY
FLOATING
SUBSTRATE
TERMINATIONS
.............
22
2.5.2.2
COMMON
FLOATING
SUBSTRATE
TERMINATION
....................
24
2.5.3
TRANSIENT
SUBSTRATE
VOLTAGE
EXTREMA
AND
SWING
.......................
25
2.5.4
SEMI-FLOATING
SUBSTRATE
TERMINATION
NETWORKS
..........................
26
2.5.5
CALCULATION
OF
SUBSTRATE
VOLTAGES
USING
MEASURED
CAPACITANCE
DATA
.....................................................................................................
29
2.6
CAPACITANCE
TRANSFORMATION
FOR
HALF-BRIDGES
TO
ELIMINATE
SUBSTRATE
DEPENDENCE
.....................................................................................................
30
2.6.1
METHOD
FOR
HALF-BRIDGES
WITHOUT
AND
WITH
COUPLED
SUBSTRATES
32
2.6.2
B=S
(CONVENTIONAL)
TERMINATION
.....................................................
34
2.6.3
B=D
TERMINATION
...............................................................................
35
2.6.4
B=G
TERMINATION
...............................................................................
36
2.6.5
SEPARATELY
B=FLOATING
TERMINATION
(DISCRETE
DEVICES)
.............
36
2.6.6
COMMON
B=FLOATING
TERMINATION
(HALF-BRIDGE)
.......................
37
2.7
CALCULATED
SWITCHING
CHARACTERISTICS
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
38
2.7.1
OUTPUT-RELATED
EFFECTIVE
CAPACITANCES
COSS,
CGW,
C
DC
.............
38
2.7.2
SWITCHING
ENERGIES
E
QSS
AND
E
QOSS
..............................................
41
2.7.3
SWITCHING
CHARGES
QOSS
AND
QSW
.................................................
41
2.7.4
FEEDBACK-RELATED
EFFECTIVE
CAPACITANCES
C
RSS
.
CXSS
................
42
2.7.5
INPUT-RELATED
EFFECTIVE
CAPACITANCES
CSS,
C
RSS
,
CXSS
................
43
2.8
EXPERIMENTAL
SWITCHING
CHARACTERISTICS
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
..................................................................................................
45
2.8.1
EXPERIMENTAL
SETUP
FOR
SUBSTRATE
TERMINATION
VARIATION
....
45
2.8.2
SWITCHING
ENERGIES
ES
W
...................................................................
46
2.8.3
SWITCH-NODE
CHARGE
QSW
................................................................
47
2.8.4
REVERSE
FEEDBACK-RELATED
QUANTITIES
............................................
48
2.8.5
RESISTANCE
INCREASE
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
....
50
2.8.6
DC-DC
CONVERTER
EFFICIENCY
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
51
2.8.7
DUTY-CYCLE
DEPENDENT
POWER
LOSS
.................................................
52
2.8.8
VERIFICATION
OF
DUTY-CYCLE
INDEPENDENT
SUBSTRATE
BIASING
NETWORK
53
2.9
EXPERIMENTAL
MONOLITHIC
GAN-ON-SI
HALF-BRIDGE
AND
DRIVER
OPERATION
.
56
2.10
SUMMARY
AND
CONCLUSION
...............................................................................
57
3
LOW-INDUCTIVE
AND
CLEAN
SWITCHING
OF
HALF-BRIDGES
AND
GATE
DRIVERS
61
3.1
PROBLEM
AND
APPROACH
..................................................................................
61
3.2
ANALYSIS
OF
PARASITIC
INDUCTANCE-RELATED
VOLTAGE
SWITCHING
TRANSITIONS
63
3.2.1
INSTANTANEOUS
STEP-VOLTAGE
SWITCHING
...........................................
63
3.2.2
LIMITED
VOLTAGE
SLEW-RATE
SWITCHING
...........................................
69
3.2.3
DISCREPANCY
BETWEEN
MEASURED
AND
INTRINSIC
SWITCHING
TIMES
.
75
3.3
EXPERIMENTAL
OVERSHOOT
MEASUREMENT
FOR
LIMITED
SLEW-RATE
SWITCHING
77
3.4
ESTIMATION
OF
TYPICAL
DAMPING
FACTORS
AND
OPTIMAL
SWITCHING
TIMES
.
80
3.5
REDUCTION
OF
PARASITIC
GATE-LOOP
AND
POWER-LOOP
INDUCTANCE
.............
81
3.5.1
MONOLITHIC
INTEGRATED
GATE
DRIVER
..................................................
81
3.5.2
MONOLITHIC
INTEGRATED
HALF-BRIDGE
..................................................
86
3.5.3
PACKAGE-LEVEL
INTEGRATION
USING
PCB-EMBEDDING
.......................
90
3.5.4
QUANTIFIED
REDUCTION
OF
THE
PARASITIC
INDUCTANCE
........................
90
3.5.5
DISCUSSION
OF
LOW-INDUCTIVE
INTEGRATION
APPROACHES
.................
92
3.6
EXPERIMENTAL
RGB-EMBEDDED
DISCRETE
HALF-BRIDGE
WITH
DRIVERS
AND
ON-PACKAGE
CAPACITORS
........................................................................
94
3.7
SUMMARY
AND
CONCLUSION
...............................................................................
95
4
PARASITIC
SUBSTRATE-LOOP
INDUCTANCE
AND
RELATED
INSTABILITIES
99
4.1
PROBLEM
AND
APPROACH
..................................................................................
99
4.2
PARASITIC
INDUCTANCE
FROM
THE
SUBSTRATE
TERMINATION
.............................
100
4.3
EQUIVALENT
FEEDBACK
AMPLIFIER
.....................................................................
102
4.3.1
CIRCUIT
TRANSFORMATION
METHOD
....................................................
102
4.3.2
FULL
EQUIVALENT
CIRCUIT
TRANSFORMATION
...........................................
103
4.4
STABILITY
ANALYSIS
............................................................................................
105
4.4.1
EVALUATION
OF
STABILITY
CONDITION
....................................................
105
4.4.2
PARAMETERS
FOR
QUANTITATIVE
STABILITY
EVALUATION
.......................
106
4.4.3
EFFECT
OF
GATE-LOOP
AND
POWER-LOOP
PARASITIC
INDUCTANCE
.
.
.
106
4.4.4
INSTABILITIES
FROM
SUBSTRATE-LOOP
DESPITE
IDEAL
GATE
AND
POWER
LOOP
.....................................................................................................
108
4.4.5
PARASITIC
COMMON-SOURCE
SUBSTRATE
INDUCTANCE
L
CSB
.............
110
4.5
RESISTIVE
DAMPING
OF
PARASITIC
SUBSTRATE-LOOP
.........................................
112
4.6
EXPERIMENTAL
VERIFICATION
OF
SUBSTRATE-LOOP
DAMPING
METHOD
.............
113
4.7
REDUCTION
AND
AVOIDANCE
OF
PARASITIC
SUBSTRATE-LOOP
INDUCTANCE
.
.
.
116
4.8
SUMMARY
AND
CONCLUSION
...............................................................................
118
5
SUMMARY
AND
CONCLUSION
121
A
APPENDIX
125
A.1
STAR-TO-DELTA
AND
STAR-TO-MESH
TRANSFORMATION
.........................................
125
A.
2
EXTRACTION
OF
PARAMETERS
FROM
MEASUREMENT
DATA
..................................
126
A.
3
FOUR-TERMINAL
CAPACITANCE
MULTI-BIAS
MEASUREMENT
DATA
.......................
127
BIBLIOGRAPHY
131
ACKNOWLEDGMENT
141
|
adam_txt |
CONTENTS
EXECUTIVE
SUMMARY
I
ZUSAMMENFASSUNG
III
1
INTRODUCTION
1
1.1
BACKGROUND
.
1
1.2
STATE
OF
THE
ART
.
2
1.3
PROBLEM
.
3
1.4
SCOPE
OF
THE
WORK
.
4
1.5
RESEARCH
QUESTIONS
.
6
1.6
STRUCTURE
OF
THE
THESIS
.
7
2
SUBSTRATE-RELATED
SWITCHING
CHARACTERISTICS
OF
GAN-ON-SI
HALF-BRIDGES
9
2.1
PROBLEM
AND
APPROACH
.
9
2.2
CAPACITANCES
OF
INDIVIDUAL
TRANSISTORS
.
11
2.2.1
TERMINAL
CAPACITANCES
OF
THREE
AND
FOUR-TERMINAL
HEMTS
.
.
11
2.2.2
EFFECTIVE
CAPACITANCES
.
12
2.2.3
NON-LINEAR
MULTI-BIAS
CAPACITANCES
.
13
2.2.4
CONDENSED
CAPACITANCES-RELATED
QUANTITIES
AT
NOMINAL
OPERATION
VOLTAGE
.
15
2.3
LIMITED
OPERATION
VOLTAGE
FROM
SUBSTRATE
BIASING
.
16
2.4
ANALYZED
HALF-BRIDGE
SUBSTRATE
TERMINATIONS
.
19
2.5
SUBSTRATE
VOLTAGE
ANALYSIS
.
20
2.5.1
SUBSTRATE-TO-SOURCE
VOLTAGE
CALCULATION
FOR
FIXED
SUBSTRATE
TERMINATIONS
.
20
2.5.2
SUBSTRATE-TO-SOURCE
VOLTAGE
CALCULATION
FOR
FLOATING
SUBSTRATE
TERMINATIONS
.
22
2.5.2.1
SEPARATELY
FLOATING
SUBSTRATE
TERMINATIONS
.
22
2.5.2.2
COMMON
FLOATING
SUBSTRATE
TERMINATION
.
24
2.5.3
TRANSIENT
SUBSTRATE
VOLTAGE
EXTREMA
AND
SWING
.
25
2.5.4
SEMI-FLOATING
SUBSTRATE
TERMINATION
NETWORKS
.
26
2.5.5
CALCULATION
OF
SUBSTRATE
VOLTAGES
USING
MEASURED
CAPACITANCE
DATA
.
29
2.6
CAPACITANCE
TRANSFORMATION
FOR
HALF-BRIDGES
TO
ELIMINATE
SUBSTRATE
DEPENDENCE
.
30
2.6.1
METHOD
FOR
HALF-BRIDGES
WITHOUT
AND
WITH
COUPLED
SUBSTRATES
32
2.6.2
B=S
(CONVENTIONAL)
TERMINATION
.
34
2.6.3
B=D
TERMINATION
.
35
2.6.4
B=G
TERMINATION
.
36
2.6.5
SEPARATELY
B=FLOATING
TERMINATION
(DISCRETE
DEVICES)
.
36
2.6.6
COMMON
B=FLOATING
TERMINATION
(HALF-BRIDGE)
.
37
2.7
CALCULATED
SWITCHING
CHARACTERISTICS
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
38
2.7.1
OUTPUT-RELATED
EFFECTIVE
CAPACITANCES
COSS,
CGW,
C
DC
.
38
2.7.2
SWITCHING
ENERGIES
E
QSS
AND
E
QOSS
.
41
2.7.3
SWITCHING
CHARGES
QOSS
AND
QSW
.
41
2.7.4
FEEDBACK-RELATED
EFFECTIVE
CAPACITANCES
C
RSS
.
CXSS
.
42
2.7.5
INPUT-RELATED
EFFECTIVE
CAPACITANCES
CSS,
C
RSS
,
CXSS
.
43
2.8
EXPERIMENTAL
SWITCHING
CHARACTERISTICS
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
.
45
2.8.1
EXPERIMENTAL
SETUP
FOR
SUBSTRATE
TERMINATION
VARIATION
.
45
2.8.2
SWITCHING
ENERGIES
ES
W
.
46
2.8.3
SWITCH-NODE
CHARGE
QSW
.
47
2.8.4
REVERSE
FEEDBACK-RELATED
QUANTITIES
.
48
2.8.5
RESISTANCE
INCREASE
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
.
50
2.8.6
DC-DC
CONVERTER
EFFICIENCY
FOR
DIFFERENT
SUBSTRATE
TERMINATIONS
51
2.8.7
DUTY-CYCLE
DEPENDENT
POWER
LOSS
.
52
2.8.8
VERIFICATION
OF
DUTY-CYCLE
INDEPENDENT
SUBSTRATE
BIASING
NETWORK
53
2.9
EXPERIMENTAL
MONOLITHIC
GAN-ON-SI
HALF-BRIDGE
AND
DRIVER
OPERATION
.
56
2.10
SUMMARY
AND
CONCLUSION
.
57
3
LOW-INDUCTIVE
AND
CLEAN
SWITCHING
OF
HALF-BRIDGES
AND
GATE
DRIVERS
61
3.1
PROBLEM
AND
APPROACH
.
61
3.2
ANALYSIS
OF
PARASITIC
INDUCTANCE-RELATED
VOLTAGE
SWITCHING
TRANSITIONS
63
3.2.1
INSTANTANEOUS
STEP-VOLTAGE
SWITCHING
.
63
3.2.2
LIMITED
VOLTAGE
SLEW-RATE
SWITCHING
.
69
3.2.3
DISCREPANCY
BETWEEN
MEASURED
AND
INTRINSIC
SWITCHING
TIMES
.
75
3.3
EXPERIMENTAL
OVERSHOOT
MEASUREMENT
FOR
LIMITED
SLEW-RATE
SWITCHING
77
3.4
ESTIMATION
OF
TYPICAL
DAMPING
FACTORS
AND
OPTIMAL
SWITCHING
TIMES
.
80
3.5
REDUCTION
OF
PARASITIC
GATE-LOOP
AND
POWER-LOOP
INDUCTANCE
.
81
3.5.1
MONOLITHIC
INTEGRATED
GATE
DRIVER
.
81
3.5.2
MONOLITHIC
INTEGRATED
HALF-BRIDGE
.
86
3.5.3
PACKAGE-LEVEL
INTEGRATION
USING
PCB-EMBEDDING
.
90
3.5.4
QUANTIFIED
REDUCTION
OF
THE
PARASITIC
INDUCTANCE
.
90
3.5.5
DISCUSSION
OF
LOW-INDUCTIVE
INTEGRATION
APPROACHES
.
92
3.6
EXPERIMENTAL
RGB-EMBEDDED
DISCRETE
HALF-BRIDGE
WITH
DRIVERS
AND
ON-PACKAGE
CAPACITORS
.
94
3.7
SUMMARY
AND
CONCLUSION
.
95
4
PARASITIC
SUBSTRATE-LOOP
INDUCTANCE
AND
RELATED
INSTABILITIES
99
4.1
PROBLEM
AND
APPROACH
.
99
4.2
PARASITIC
INDUCTANCE
FROM
THE
SUBSTRATE
TERMINATION
.
100
4.3
EQUIVALENT
FEEDBACK
AMPLIFIER
.
102
4.3.1
CIRCUIT
TRANSFORMATION
METHOD
.
102
4.3.2
FULL
EQUIVALENT
CIRCUIT
TRANSFORMATION
.
103
4.4
STABILITY
ANALYSIS
.
105
4.4.1
EVALUATION
OF
STABILITY
CONDITION
.
105
4.4.2
PARAMETERS
FOR
QUANTITATIVE
STABILITY
EVALUATION
.
106
4.4.3
EFFECT
OF
GATE-LOOP
AND
POWER-LOOP
PARASITIC
INDUCTANCE
.
.
.
106
4.4.4
INSTABILITIES
FROM
SUBSTRATE-LOOP
DESPITE
IDEAL
GATE
AND
POWER
LOOP
.
108
4.4.5
PARASITIC
COMMON-SOURCE
SUBSTRATE
INDUCTANCE
L
CSB
.
110
4.5
RESISTIVE
DAMPING
OF
PARASITIC
SUBSTRATE-LOOP
.
112
4.6
EXPERIMENTAL
VERIFICATION
OF
SUBSTRATE-LOOP
DAMPING
METHOD
.
113
4.7
REDUCTION
AND
AVOIDANCE
OF
PARASITIC
SUBSTRATE-LOOP
INDUCTANCE
.
.
.
116
4.8
SUMMARY
AND
CONCLUSION
.
118
5
SUMMARY
AND
CONCLUSION
121
A
APPENDIX
125
A.1
STAR-TO-DELTA
AND
STAR-TO-MESH
TRANSFORMATION
.
125
A.
2
EXTRACTION
OF
PARAMETERS
FROM
MEASUREMENT
DATA
.
126
A.
3
FOUR-TERMINAL
CAPACITANCE
MULTI-BIAS
MEASUREMENT
DATA
.
127
BIBLIOGRAPHY
131
ACKNOWLEDGMENT
141 |
any_adam_object | 1 |
any_adam_object_boolean | 1 |
author | Mönch, Stefan |
author2 | Ambacher, Oliver |
author2_role | edt |
author2_variant | o a oa |
author_GND | (DE-588)1245828460 |
author_facet | Mönch, Stefan Ambacher, Oliver |
author_role | aut |
author_sort | Mönch, Stefan |
author_variant | s m sm |
building | Verbundindex |
bvnumber | BV048521684 |
classification_rvk | ZN 8340 |
ctrlnum | (OCoLC)1334371552 (DE-599)DNB1254832807 |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Thesis Book |
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genre | (DE-588)4113937-9 Hochschulschrift gnd-content |
genre_facet | Hochschulschrift |
id | DE-604.BV048521684 |
illustrated | Illustrated |
index_date | 2024-07-03T20:50:07Z |
indexdate | 2024-07-10T09:40:28Z |
institution | BVB |
institution_GND | (DE-588)4786605-6 |
isbn | 9783839617762 3839617766 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-033898564 |
oclc_num | 1334371552 |
open_access_boolean | |
owner | DE-83 |
owner_facet | DE-83 |
physical | IV, 141 Seiten Illustrationen 21 cm x 14.8 cm |
publishDate | 2022 |
publishDateSearch | 2022 |
publishDateSort | 2022 |
publisher | Fraunhofer Verlag |
record_format | marc |
series | Science for systems |
series2 | Science for systems |
spelling | Mönch, Stefan Verfasser (DE-588)1245828460 aut Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. Stefan Mönch 202204 Stuttgart Fraunhofer Verlag 2022 IV, 141 Seiten Illustrationen 21 cm x 14.8 cm txt rdacontent n rdamedia nc rdacarrier Science for systems 54 Dissertation Univ., Freiburg 2021 Treiberschaltung (DE-588)4272299-8 gnd rswk-swf Gleichspannungswandler (DE-588)4308858-2 gnd rswk-swf Galliumnitrid (DE-588)4375592-6 gnd rswk-swf Substrat Mikroelektronik (DE-588)4229622-5 gnd rswk-swf HEMT (DE-588)4211873-6 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Leistungselektronik (DE-588)4035235-3 gnd rswk-swf Silicium (DE-588)4077445-4 gnd rswk-swf Power Integrated Circuits Gallium Nitride Substrates Transistors Wide Band Gap Semiconductors Elektroingenieure , Materialwissenschaftler Physiker (DE-588)4113937-9 Hochschulschrift gnd-content Galliumnitrid (DE-588)4375592-6 s HEMT (DE-588)4211873-6 s Leistungselektronik (DE-588)4035235-3 s DE-604 Integrierte Schaltung (DE-588)4027242-4 s Treiberschaltung (DE-588)4272299-8 s Gleichspannungswandler (DE-588)4308858-2 s Silicium (DE-588)4077445-4 s Substrat Mikroelektronik (DE-588)4229622-5 s Ambacher, Oliver edt Fraunhofer IAF, Freiburg isb Fraunhofer IRB-Verlag (DE-588)4786605-6 pbl Science for systems 54 (DE-604)BV042534020 54 X:MVB text/html http://deposit.dnb.de/cgi-bin/dokserv?id=9e73b69c43864dbc86d0655fc903de94&prov=M&dok_var=1&dok_ext=htm Inhaltstext DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=033898564&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis 1\p vlb 20220405 DE-101 https://d-nb.info/provenance/plan#vlb |
spellingShingle | Mönch, Stefan Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. Science for systems Treiberschaltung (DE-588)4272299-8 gnd Gleichspannungswandler (DE-588)4308858-2 gnd Galliumnitrid (DE-588)4375592-6 gnd Substrat Mikroelektronik (DE-588)4229622-5 gnd HEMT (DE-588)4211873-6 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Leistungselektronik (DE-588)4035235-3 gnd Silicium (DE-588)4077445-4 gnd |
subject_GND | (DE-588)4272299-8 (DE-588)4308858-2 (DE-588)4375592-6 (DE-588)4229622-5 (DE-588)4211873-6 (DE-588)4027242-4 (DE-588)4035235-3 (DE-588)4077445-4 (DE-588)4113937-9 |
title | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. |
title_auth | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. |
title_exact_search | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. |
title_exact_search_txtP | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. |
title_full | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. Stefan Mönch |
title_fullStr | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. Stefan Mönch |
title_full_unstemmed | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. Stefan Mönch |
title_short | Switching Characteristics of Integrated GaN-on-Si Half-Bridge and Driver Circuits. |
title_sort | switching characteristics of integrated gan on si half bridge and driver circuits |
topic | Treiberschaltung (DE-588)4272299-8 gnd Gleichspannungswandler (DE-588)4308858-2 gnd Galliumnitrid (DE-588)4375592-6 gnd Substrat Mikroelektronik (DE-588)4229622-5 gnd HEMT (DE-588)4211873-6 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Leistungselektronik (DE-588)4035235-3 gnd Silicium (DE-588)4077445-4 gnd |
topic_facet | Treiberschaltung Gleichspannungswandler Galliumnitrid Substrat Mikroelektronik HEMT Integrierte Schaltung Leistungselektronik Silicium Hochschulschrift |
url | http://deposit.dnb.de/cgi-bin/dokserv?id=9e73b69c43864dbc86d0655fc903de94&prov=M&dok_var=1&dok_ext=htm http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=033898564&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
volume_link | (DE-604)BV042534020 |
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