Microprocessor architecture and programming:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York [u.a.]
Wiley
1977
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Beschreibung: | XII, 237 S. zahlr. graph. Darst. |
| ISBN: | 0471018899 |
Internformat
MARC
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| 100 | 1 | |a Leahy, William F. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Microprocessor architecture and programming |c William F. Leahy |
| 264 | 1 | |a New York [u.a.] |b Wiley |c 1977 | |
| 300 | |a XII, 237 S. |b zahlr. graph. Darst. | ||
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| 650 | 4 | |a Ordinateurs - Architecture | |
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Datensatz im Suchindex
| _version_ | 1804116434305941504 |
|---|---|
| adam_text | Titel: Microprocessor architecture and programming
Autor: Leahy, William F
Jahr: 1977
CONTENTS
CHAPTER 1 INTRODUCTION
CHAPTER 2 THE MICROPROCESSOR—AN OVERVIEW
Basic Elements of the Classical Computer 3
The Arithmetic/Logic Unit 3
The Program-control Unit 5
The Main Memory 9
The Input/Output Unit 9
The Computer in Operation 10
CHAPTER 3 THE BIPOLAR/MOS TECHNOLOGIES
The Basic MOS Technologies 18
Operation of the MOS Transistor 19
Advantages of MOS LSI 20
Economic Factors 21
Performance Factors 25
CHAPTER 4 THE MEMORY
The Memory Systems 28
Binary-to-decimal Conversion 29
Decimal-to-binary Conversion 31
Types of Memory-storage Format 33
CHAPTER 5 THE SEQUENTIALLY ACCESSED STORAGE
MEMORY
Data Formats 35
The Semiconductor Shift Register 36
CHAPTER 6
THE RANDOM-ACCESS STORAGE MEMORY
Cell Addressing 40
The Magnetic Core Memory 45
Semiconductor Random-access Memories 46
The Bipolar Memory Cell 47
The MOS Memory Cell 49
The RAM Memory Planes 52
Memory-cell Addressing 53
CHAPTER 7 STATIC DATA AND CONTROL MEMORIES
Modified RAM System 63
Semiconductor ROM Systems 65
The Mask-programmable ROM 65
The Field-programmable ROM 68
The Erasable-Programmable ROM (EROM)
The Programmed Logic Array (PLA) 72
CHAPTER 8 THE CENTRAL PROCESSING UNIT (CPU)
The Bus System 77
The Multiphase Clock and Strobe Generation System
Strobes 81
The Stack-Pointer System 82
The Arithmetic Logic Unit (ALU) 84
The CPU Interface 88
CHAPTER 9 THE MICROPROCESSOR INTERFACE
The Digital Peripheral Interface 90
The Keyboard 91
The Sequentially Accessed Source 95
The Analog Interface 98
The Analog-to-digital (A/D) Converter 99
The Digital-to-analog (D/A) Converter (DAC)
The Phase-locked-loop (PLL) Converter 102
CHAPTER 10 PROGRAMMING THE MICROPROCESSOR
The Programming Languages -106
Machine-level Language 106
Assembler-level Language 107
Higher-level Language 108
Contents
The Flowchart Programming Technique 109
Flowchart Notations 110
Machine-level Flowcharting 114
Machine-level Programming 117
CHAPTER 11 THE INTEL 8008 MACHINE LANGUAGE
The Basic Instruction Cycle 124
The On-chip Registers 127
The 8008 Instruction Set 127
CHAPTER 12 THE HEXADECIMAL OPERATION CODES
The Computer Number Systems 140
The Octal Number System 140
The Hexadecimal Number System 141
The Hexadecimal Operation Code Set 142
Binary-to-hexadecimal Code Conversion 142
The Hexadecimal Intel 8008 Operation Code Matrix
Use of the Intel 8008 Operation Code Matrix 145
The Programming Sheet 146
CHAPTER 13 INTRODUCTION TO PROGRAMMING ALGO-
RITHMS
The Programmed Loop Counter 150
The Arithmetic Algorithms 153
Addition and Subtraction 153
Multiplication 156
Division 157
The Process-control Algorithm 162
The Indefinite Pause 162
The Fixed Time Delay 166
CHAPTER 14 THE COMPLETE SYSTEM CONTROLLERS
HARDWARE VERSUS SOFTWARE
PROGRAMMING
The Traffic Controller—An Example 170
The Clock Function 171
The Sensor Functions 173
Sensor Requests 174
Hardware Implementation of the Traffic Controller
The Traffic-control Logic Flowchart 176
The Candy-Factory Algorithm—An Example 195
xil Contents
CHAPTER 15 BEYOND THE INTEL 8008 207
The Intel 8080 Microprocessor System 208
The 8080 Program-instruction Set 208
The Hexadecimal 8080 Operation-Code Matrix 214
The Motorola M6800 Microprocessor System 216
The M6800 Program-instruction Set 216
The Hexadecimal M6800 Operation Code Matrix 219
APPENDIX GLOSSARY OF MICROPROCESSOR TERMS 226
REFERENCES 230
INDEX
235
|
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| id | DE-604.BV001988047 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:38:27Z |
| institution | BVB |
| isbn | 0471018899 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001296712 |
| oclc_num | 2818677 |
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| physical | XII, 237 S. zahlr. graph. Darst. |
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| publishDate | 1977 |
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| publisher | Wiley |
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| spelling | Leahy, William F. Verfasser aut Microprocessor architecture and programming William F. Leahy New York [u.a.] Wiley 1977 XII, 237 S. zahlr. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Microprocesseurs Ordinateurs - Architecture Computer architecture Microprocessors HBZ Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=001296712&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Leahy, William F. Microprocessor architecture and programming Microprocesseurs Ordinateurs - Architecture Computer architecture Microprocessors |
| title | Microprocessor architecture and programming |
| title_auth | Microprocessor architecture and programming |
| title_exact_search | Microprocessor architecture and programming |
| title_full | Microprocessor architecture and programming William F. Leahy |
| title_fullStr | Microprocessor architecture and programming William F. Leahy |
| title_full_unstemmed | Microprocessor architecture and programming William F. Leahy |
| title_short | Microprocessor architecture and programming |
| title_sort | microprocessor architecture and programming |
| topic | Microprocesseurs Ordinateurs - Architecture Computer architecture Microprocessors |
| topic_facet | Microprocesseurs Ordinateurs - Architecture Computer architecture Microprocessors |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=001296712&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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