Extended abstracts of the 2000 International Conference on Solid State Devices and Materials: August 29 - 31. 2000, Sendai, Sendai International Center
Gespeichert in:
| Körperschaft: | |
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| Format: | Tagungsbericht Buch |
| Sprache: | English |
| Veröffentlicht: |
Tokyo
Business Center for Academic Societies Japan
2000
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| Schlagworte: | |
| Online-Zugang: | lizenzfrei Inhaltsverzeichnis |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XXXVII, 565 S. Ill., graph. Darst. |
| ISBN: | 4891140062 |
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| adam_text | EXTENDED ABSTRACTS OF THE 2000 INTERNATIONAL CONFERENCE ON SOLID STATE
DEVICES AND MATERIALS AUGUST 29-31, 2000 SENDAI SENDAI INTERNATIONAL
CENTER SPONSORED BY THE JAPAN SOCIETY OF APPLIED PHYSICS TECHNICAL
COSPONSORED BY IEEE ELECTRON DEVICES SOCIETY IN COOPERATION WITH THE
INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS IEEE
EDS JAPAN CHAPTER THE INSTITUTE OF ELECTRICAL ENGINEERS OF JAPAN THE
ELECTROCHEMICAL SOCIETY OF JAPAN THE INSTITUTE OF IMAGE INFORMATION AND
TELEVISION ENGINEERS CONTENTS AUGUST 29, TUESDAY MAIN HALL P OF 9:00 (0)
9:10 (1) 9:50 (2) 10:30 (3) 11:10 (4) 11:50 (5) ROOMA WELCOME ADDRESS,
T. OHMI, ORGANIZING COMMITTEE CHAIRPERSON THE RELATIONSHIP BETWEEN
STANFORD AND SILICON VALLEY: A DEAN S PERSPECTIVE (PLENARY) J.F.
GIBBONS, STANFORD UNIV., USA 2 SOP AND SOC: THE BEST OF BOTH (PLENARY)
R.R. TUMMALA, GEORGIA INST, OF TECHNO!., USA 4 REQUIRED DEVICE
TECHNOLOGIES FOR FUTURE PHOTONIC NETWORKS (PLENARY) M. KAWACHI, NTT,
JAPAN 10 THE ROLE MICROFABRICATION IN THE COMING CENTURY OF BIOLOGY
(PLENARY) D.J. HARRISON, UNIV. OFALBERTA, CANADA 12 SSDMAWARD
PRESENTATION A-L: SILICON PROCESS/MATERIALS TECHNOLOGIES -MOS
DEVICES/INTERCONNECTS I (13:30-15:30) 13:30 (1) INTEGRATED CIRCUIT
CHALLENGES, FROM TRANSISTORS TO PACKAGES (INVITED) M. BOHR, INTEL, USA
14 14:00 (2) NEW MECHANISMS AND THE CHARACTERIZATION OF PLASMA CHARGING
ENHANCED HOT CARRIER EFFECT IN DEEP-SUBMICRON N-MOSFET S S.J. CHEN, H.L.
KAO, S.S. CHUNG, C.C. CHEN, C.Y. CHANG AND H.C. LIN*, NATIONAL CHIAO
TUNG UNIV. AND *NATIONAL NANO DEVICE LAB., TAIWAN 16 14:15 (3) INDIUM
PROFILE CONTROL FOR SUPER STEEP RETROGRADE (SSR) WELL T. MATSUDA, A.
MINEJI, N. NISHIO AND H. KITAJIMA, NEC, JAPAN 18 14:30 .(4) A STUDY ON
MECHANISM OF CHEMICAL MECHANICAL POLISHING ON AL AND CU SURFACES
EMPLOYING IN-SITU INFRARED SPECTROSCOPY H. OGAWA, Y. TOKUYAMA, M.
YANAGISAWA*, J. KIKUCHI** AND Y. HORIIKE, UNIV. OF TOKYO, *SPEEDFAM-IPEC
AND **AXIOMATEC, JAPAN 20 14:45 (5) CHARACTERIZATION OF TUNGSTEN CARBIDE
AS DIFFUSION BARRIER FOR CU METALLIZATION S.J. WANG, H.Y. TSAI AND S.C.
SUN*, NATIONAL CHENG KUNG UNIV., TAIWAN AND *WAFERTECH, USA 22 15:00 (6)
ALUMINUM CHEMICALVAPORDEPOSITIONTECHNOLOGY FOR HIGH DEPOSITION RATEAND
SURFACE MORPHOLOGY IMPROVEMENT C.-H. LEE, T. NISHIMURA, K. MASU AND K.
TSUBOUCHI, TOHOKU UNIV., JAPAN 24 15:15 (7) NOVEL NOZZLE-SCAN COATING
METHOD FOR LOW-K FILMS R. NAKATA, N. YAMADA, A. KAJITA, S. ITO, K.
OKUMURA, T. KITANO*, M. MORIKAWA*, K. TAKESHITA*, Y. ESAKI* AND M.
AKIMOTO*. TOSHIBA AND *TOKYO ELECTRON KYUSHU, JAPAN 26 A-2: SILICON
PROCESS/MATERIALS TECHNOLOGIES -INTERCONNECTS II- (15:45-17:45) 15:45
(1) RELIABILITY AND ELECTROMIGRATION FAILURE MODES IN DUAL INLAID CU
INTERCONNECTS (INVITED) C. CAPASSO, M. HERRICK, M. GALL, D. JAWARANI, S.
THRASHER, L. ZHAO* AND H. KAWASAKI, MOTOROLA AND *ADVANCED MICRO
DEVICES*, USA 28 16:15 (2) COPPER ELECTRODEPOSITION: PRINCIPLES AND
RECENT PROGRESS (INVITED) J. REID, NOVELLUS SYSTEMS, USA 30 * XIX *
16:45 (3) ULTRA-THIN SILICON OXYNITRIDE FILMS AS CU DIFFUSION BARRIER
FOR LOWERING INTERCONNECT RESISTIVITY T. NANBU, K. SEKINE, Y. SAITO, S.
NAKAO, M. HIRAYAMA AND T. OHMI, TOHOKU UNIV., JAPAN 32 17:00 (4) COPPER
ION DRIFT RATES IN POROUS METHYLSILSESQUIAZANE DIELECTRIC FILMS S.
MUKAIGAWA, T. ODA, T. AOKI*, Y. SHIMIZU* AND T. KIKKAWA, HIROSHIMA UNIV.
AND *TONEN, JAPAN 34 17:15 (5) DIELECTRIC BREAKDOWN AND LIGHT EMISSION
IN COPPER DAMASCENE STRUCTURE UNDER BIAS- TEMPERATURE STRESS K. TAKEDA,
K. HINODE, J. NOGUCHI AND H. YAMAGUCHI, HITACHI, JAPAN 36 17:30 (6)
EVALUATION OFPECVD A-SIC:H AS A CU DIFFUSION BARRIER LAYER OF CU DUAL
DAMASCENE PROCESS S.G. LEE, H.-S. OH, H.-J. SHIN, J.-G. HONG, H.-D. LEE
AND H. KANG, SAMSUNG ELECTRONICS, KOREA 38 ROOM B B-L: ADVANCED SILICON
DEVICES AND DEVICE PHYSICS I (13:30-15:30) 13:30 (1) DEUTERIUM EFFECT ON
BOTH INTERFACE-STATE GENERATION AND STRESS-INDUCED-LEAKAGE- CURRENT
UNDER FOWLER-NORDHEIM ELECTRON INJECTION Y. MITANI, H. SATAKE, H. ITO
AND A. TORIUMI, TOSHIBA, JAPAN 40 13:45 (2) QUANTITATIVE UNDERSTANDING
OF ELECTRON MOBILITY LIMITED BY COULOMB SCATTERING IN MOSFETS WITH N20
ANDNO OXYNITRIDES T. ISHIHARA, S. TAKAGI AND M. KONDO, TOSHIBA, JAPAN 42
14:00 (3) THE IMPACT FOR GATE OXIDE SCALING (32A-12A) AND POWER SUPPLY
FOR SUB-0.1 //M CMOSFETS W.K. YEH, C.Y. LIN, S.M. CHENG, C.T. HUANG,
H.H. SHIH, J.K. CHEN AND F.T. LIOU, UNITED MICROELECTRONICS, TAIWAN 44
14:15 (4) SURFACE CHANNEL METAL GATE CMOS WITH LIGHT COUNTER DOPING AND
SINGLE WORK FUNCTION GATE ELECTRODE K.T. NISHINOHARA, Y. AKASAKA,
T.SAITO, A. YAGISHITA, A. MURAKOSHI, K. SUGURO AND T. ARIKADO, TOSHIBA,
JAPAN 46 14:30 (5) HIGH DENSITY 0.16 (IM EMBEDDED-DRAM-ASIC PROCESS
TECHNOLOGY FOR A SOC PLATFORM J. IDA, H. TANAKA, K. FUKUDA, M. TAKEDA,
H. SHINOHARA, N. NAKAYAMA, E. SEO, K. YOSHIDA, H. HIGASHINO, Y.
MIYAKAWA, M. KAGEYAMA, Y. HARADA, M. MATSUMOTO, T. INOUE AND F.
YOKOYAMA, OKI ELECTRIC, JAPAN 48 14:45 (6) 70NM NMOSFET FABRICATION WITH
12NM N+-P JUNCTIONS USINGAS2+A LOW ENERGY ION IMPLANTATIONS B.Y. CHOI,
S.K. SUNG, B.G. PARK AND J.D. LEE, SEOUL NATIONAL UNIV., KOREA 50 15:00
(7) SELF-ALIGNED POCKET IMPLANTATION INTO ELEVATED SOURCE/DRAIN MOSFETS
FOR REDUCTION OF JUNCTION CAPACITANCE AND LEAKAGE CURRENT N. MIURA, Y.
ABE, K. SUGIHARA, T. OISHI, T. FURUKAWA, T. NAKAHATA, K. SHIOZAWA, S.
MARUNO AND Y. TOKUDA, MITSUBISHI ELECTRIC, JAPAN 52 15:15 (8) A NOVEL
T-SHAPED SHALLOW TRENCH ISOLATION TECHNOLOGY USING SIDEWALL SPACER FOR
512MBIT FLASH MEMORIES AND BEYOND S.H. HONG, D.H. AHN, M.H. PARK, T.K.
KIM, H.K. KANG AND J.T. MOON, SAMSUNG ELECTRONICS, KOREA 54 B-2:
ADVANCED SILICON DEVICES AND DEVICE PHYSICS II (15:45-17:45) 15:45 (1)
20NM MOS DEVICES FOR THE BIRTH OF THE 21ST CENTURY (INVITED) S.
DELEONIBUS, G. BERTRAND, G. GUEGAN, M. HEITZMANN, P. MUR, D. SOUIL AND
S. TEDESCO, LETI, FRANCE 56 16:15 (2) A STUDY OF THE VTH FLUCTUATION
FOR25NM CMOS K. TAKEUCHI, R. KOH AND T. MOGAMI, NEC, JAPAN 58 * XX *
16:30 (3) COMPARISON OF SUB-BANDGAP IMPACT IONIZATION IN DEEP-SUB-MICRON
CONVENTIONAL AND LATERAL ASYMMETRICAL CHANNELNMOSFETS A.K. G., S.
MAHAPATRA*, V.R. RAO* AND I. EISELE, UNIV. DER BUNDESWEHR MUNICH,
GERMANY AND *INDIAN INST, OF TECHNOL., INDIA 60 16:45 (4) IMPACT OF
STRAINED-SI CHANNEL ON CMOS CIRCUIT PERFORMANCE UNDER THE SUB-LOONM
REGIME T. HATAKEYAMA, K. MATSUZAWA AND S. TAKAGI, TOSHIBA, JAPAN 62
17:00 (5) IMPROVED LOW TEMPERATURE CHARACTERISTICS OF RAISED SOURCE AND
DRAIN (RSD) SIX_X G^X PMOSFET S H.J. HUANG,K.M. CHEN, T.Y. HUANG, G.W.
HUANG* AND C.Y. CHANG, NATIONAL CHIAO TUNG UNIV. AND *NATIONALNANO
DEVICE LABS., TAIWAN 64 17:15 (6) MEASUREMENT OF HOLE TRANSPORT
PARAMETERS IN ULTRA-THIN SIGE LAYERS AND THEIR APPLICATION IN 2D DEVICE
SIMULATIONS OF HETEROJUNCTIONPMOSFETS R.J.P. LANDER, Y.V. PONOMAREV,
W.B. DE BOER, R. LOO* AND M. CAYMAX*, PHILIPS RES. LABS., THE
NETHERLANDS AND *IMEC, BELGIUM 66 17:30 (7) BANDGAP AND STRAIN
ENGINEERING IN SIGEC HETEROJUNCTION BIPOLAR TRANSISTORS K. YUKI, K.
TOYODA, T. TAKAGI, Y. KANZAWA, K. NOZAWA, T. SAITOH AND M. KUBO,
MATSUSHITA ELECTRIC, JAPAN 68 ROOM C C-L: OPTOELECTRONIC DEVICES I
(13:30-15:30) 13:30 (1) ULTRAFAST DEMULTIPLEXING AND BIT-WISE LOGIC
OPERATION USING SYMMETRIC MACH-ZEHNDER ALL-OPTICAL SWITCHES (INVITED) K.
TAJIMA, S. NAKAMURA AND Y. UENO, NEC, JAPAN 70 14:00 (2) 500GHZOPTICAL
PULSE GENERATION FROM A SHORT-CAVITYGRIN-SCH-MQW MODE-LOCKED LASER DIODE
S. ARAHIRA, Y. KATOH AND Y. OGAWA, OKI ELECTRIC, JAPAN 72 14:15 (3)
OPTICAL BPSK SUBCARRIER MODULATION USING AN INTEGRATED HYBRID DEVICE M.
SHIN, J. LIM, J. KIM*, J.S. KIM*, K.E. PYUN* AND S. HONG, KAIST AND
*ETRI, KOREA 74 14:30 (4) VARIABLE WAVELENGTH SHIFTER USING FOUR-WAVE
MIXING IN A WAVELENGTH SELECTABLE LASER T. SIMOYAMA, H. KUWATSUKA, M.
BOUDA, M. MATSUDA, Y. KOTAKI AND H. ISHIKAWA, FUJITSU LABS., JAPAN 76
14:45 (5) DEMONSTRATION OF ALL-OPTICAL WAVELENGTH CONVERTER BASED ON
FABRY-PEROT SEMICONDUCTOR OPTICAL AMPLIFIER M. SAITOH, M. TAKENAKA, B.
MA AND Y. NAKANO, UNIV. OF TOKYO, JAPAN 78 15:00 (6)
POLARIZATION-DEPENDENT OPTICAL GAIN AND GAIN SATURATION IN
VERTICAL-CAVITY SURFACE- EMITTING LASERS Y. TAKAHASHI AND H. KAWAGUCHI,
YAMAGATA UNIV., JAPAN 80 15:15 (7) ALL-OPTICAL 2-D SERIAL-TO-PARALLEL
PULSE CONVERTER USING AN ORGANIC FILM WITH FEMTOSECOND OPTICAL RESPONSE
S. TATSUURA, O. WADA, M. FURUKI*, M. TIAN*, Y. SATO* AND L.S. PU*, FESTA
AND *FUJI XEROX, JAPAN 82 C-2: OPTOELECTRONIC DEVICES II (15:45-17:45)
15:45 (1) HIGH-SPEED UNI-TRAVELING-CARRIER PHOTODIODES FOR FIBER-OPTIC
COMMUNICATIONS (INVITED) H. ITO AND T. ISHIBASHI, NTT, JAPAN 84 16:15
(2) VELOCITY MISMATCHING EFFECT OF TRAVELING WAVE ELECTROABSORPTION
MODULATOR J. LIM, M. SHIN, J. KIM*, J.S. KIM*, K.E. PYUN* AND S. HONG,
KAIST AND *ETRI, KOREA 86 16:30 (3) A NOVEL HIGH RESPONSIVITY, WIDE BAND
SILICON PHOTODIODE T.N. SWE AND K.S. YEO, NANYANG TECHNOLOGICAL UNIV.,
SINGAPORE 88 16:45 (4) A NEW HIGH RADIANCE LED STRUCTURE WITH CIRCULAR
45 CORNER REFLECTOR E.-H. PARK, J.-H. CHA AND Y.-S. KWON, KAIST, KOREA
90 * XXI * 17:00 (5) HIGH-BRIGHTNESS WAFER-BONDED ITO/ALGALNP/MIRROR/SI
LIGHT EMITTING DIODES R.H. HORNG, Y.C. LIEN*, W.C. PENG* AND D.S. WUU*,
NATIONAL CHUNG HSING UNIV. AND *DA-YEH UNIV., TAIWAN 92 17:15 (6) 1.55
/JM SPOT-SIZE CONVERTER INTEGRATED LASER DIODES FABRICATED BY SELECTIVE
AREA MOVPE GROWTH WITH VARIOUS MASK PATTERNS H.-S. KIM, O.D. KON*, M.-H.
PARK*, N. HWANG* AND I.-H. CHOI, KOREA UNIV. AND *ETRI, KOREA 94 17:30
(7) FRONT MIRROR ABSORPTION CHARACTERIZATION ON HIGH-POWERGAAS LASER
DIODES BY MEANS OF THERMOREFLECTANCE TECHNIQUE E. SCHAUB AND T. BABA,
NRLM, JAPAN 96 ROOM D D-L: NOVEL DEVICES, PHYSICS, AND FABRICATION
-NOVEL ELECTRON DEVICES- (13:30-15:15) 13:30 (1) ORGANIC TRANSISTORS FOR
LOGIC AND FLEXIBLE DISPLAY APPLICATIONS (INVITED) A. DODABALAPUR, B.
CRONE, J.A. ROGERS, Z. BAO, R.W. FILAS Y.-Y. LIN, V.R. RAJU AND H.E.
KATZ, BELL LABS., U.S.A 98 14:00 (2) ULTRA-LOW BIASED FIELD EMITTERUSING
SINGLE WALL CARBON NANOTUBE DIRECTLYGROWN ONTO SILICON TIP BY THERMAL
CVD K. MATSUMOTO, S. KINOSITA, Y. GOTOH AND M. ISHII*, ETL AND *CREST,
JAPAN 100 14:15 (3) HIGH PERFORMANCEMOS TUNNELING CATHODE WITH COSI2
GATE ELECTRODE T. SADOH, Y. ZHANG, H. YASUNAGA, A. KENJO, T. TSURUSHIMA
AND M. MIYAO, KYUSHU UNIV., JAPAN 102 14:30 (4) RESONANT TUNNELING
CATHODES USING GAAS/ALAS QUANTUM STRUCTURES H. MIMURA, K. OKAMURA, Y.
NEO, H. SHIMAWAKI AND K. YOKOO, TOHOKU UNIV., JAPAN 104 14:45 (5) AN
EVIDENCE FOR BALLISTIC TRANSPORT IN NANOCRYSTALLINE POROUS SILICON LAYER
BY TIME-OF- FLIGHT MEASUREMENTS A. KOJIMA AND N. KOSHIDA, TOKYO UNIV.
OFAGRI. AND TECHNOL., JAPAN 106 15:00 (6) HIGHLY SENSITIVE MISFET
SENSORS FOR DETECTING CO GAS USING POROUS PLATINUM AND TUNGSTEN OXIDE
THIN FILMS H. FUKUDA, R. ZOHNISHI AND S. NOMURA, MURORAN INST, OF
TECHNOL., JAPAN 108 LD-1: LATE NEWS 15:15 (1) A VERTICAL, MOS-BASED
SILICON TUNNELING TRANSISTOR W. HANSCH, J. SCHULZE*, C. FINK* AND I.
EISELE*, TECHNICAL UNIV. OF MUNICH AND *UNIV. OF THE GERMAN FEDERAL
ARMED FORCES, GERMANY 110 D-2: NOVEL DEVICES, PHYSICS AND FABRICATION
-SINGLE ELECTRON DEVICES I- (15:45-18:00) 15:45 (1) QUANTISED CURRENTS
IN ONE DIMENSIONAL*CHANNELS INDUCED BY SURFACE ACOUSTIC WAVES (INVITED)
M. PEPPER, UNIV. OF CAMBRIDGE, UK 112 16:15 (2) PROPERTIES AND
APPLICATIONS OF A NOVEL ELECTROACOUSTIC INTERACTION IN GAAS RESONANT
TUNNELLING STRUCTURES A.B. HUTCHINSON, V.I. TALYANSKII, M. PEPPER, G.
GUMBS*, G.R. AIZIN*, DA. RITCHIE AND E.H. LINFIELD, UNIV. OF CAMBRIDGE,
UK, AND CITY UNIV. OFNEW YORK, USA 114 16:30 (3) SINGLE-ELECTRON
TRANSISTORS WITH TWO SELF-ALIGNED GATES K. NISHIGUCHI AND S. ODA, TOKYO
INST, OF TECHNOL., JAPAN 116 16:45 (4) STRUCTURAL AND ELECTRICAL
CHARACTERIZATION OF NANOCRYSTALLINE SILICON (NC-SI) SINGLE ELECTRON
TRANSISTORS Y.T. TAN, T. KAMIYA, Z.A.K. DURRANI, H.AHMED AND I. SHIMIZU,
UNIV. OF CAMBRIDGE, UK AND TOKYO INST, OF TECHNOL., JAPAN 118 17:00 (5)
SET/CMOS HYBRID FOR FUTURE LOW-POWER LSI -EXPERIMENTAL DEMONSTRATION,
POWER ESTIMATION, AND STRATEGY FOR ITS REDUCTION- K. UCHIDA, J. KOGA, R.
OHBA AND A. TORIUMI, TOSHIBA, JAPAN 120 * XXN * 17:15 (6) NOVEL SI
QUANTUMMEMORY STRUCTURE WITH SELF-ALIGNED STACKED NANOCRYSTALLINE DOTS
R. OHBA, N. SUGIYAMA, J. KOGA, K. UCHIDA AND A. TORIUMI, TOSHIBA, JAPAN
122 17:30 (7) TRANSIENT CHARACTERISTICS OF ELECTRON CHARGING IN
SI-QUANTUM-DOT FLOATING GATE MOS MEMORIES A. KOHNO, H. MURAKAMI*, M.
IKEDA*, H. NISHIYAMA*, S. MIYAZAKI* ANDM. HIROSE*, FUKUOKA UNIV. AND
*HIROSHIMA UNIV., JAPAN 124 17:45 (8) SINGLE ELECTRON CHARGING PHENOMENA
IN SILICON NANO-PILLARS WITH AND WITHOUT SILICON NITRIDE TUNNEL BARRIERS
D.M. POOLEY, H. AHMED, H. MIZUTA* AND K. NAKAZATO*, UNIV. OF CAMBRIDGE
AND HITACHI CAMBRIDGE LAB., UK 126 ROOM E E-L: WIDEGAP SEMICONDUCTOR
MATERIALS AND DEVICES -ZNO AND SIC DEVICES- (13:30-15:30) 13:30 (1)
CANZNO EAT MARKET IN OPTOELECTRONIC APPLICATIONS? (INVITED) M. KAWASAKI,
K. TAMURA, K. SAIKUSA, T. AITA, A. TSUKAZAKI, A. OHTOMO, Z.G. JIN, Y.
MATSUMOTO, T. FUKUMURA, H. KOINUMA, Y. OHMAKI*, S. KISHIMOTO*, Y. OHNO*,
F. MATSUKURA*, H. OHNO,* T. MAKINO**, N.T. TUAN**, H.D. SUN**, C.H.
CHIA**, Y. SEGAWA**, Z.K. TANG*** AND G.K.L. WANG***, TOKYO INST, OF
TECHNOL., *TOHOKU UNIV., **RIKEN, JAPAN AND ***HONGKONG UNIV. OF SCIENCE
AND TECHNOL., HONG KONG 128 14:00 (2) ELECTRICAL AND STRUCTURAL
PROPERTIES OF TI/AU OHMIC CONTACTS ON N-ZNO:AL H.-K. KIM, S.-H. HAN,
K.-K. KIM, W.-K. CHOI* AND T.-Y. SEONG, KJIST AND *KIST, KOREA 130 14:15
(3) C-VCHARACTERISTICS OFZNO THIN-FILM FIELD EFFECT TRANSISTOR
STRUCTURES FORMED ON GLASS SUBSTRATES Y. OHMAKI, S. KISHIMOTO, Y. OHNO,
F. MATSUKURA, H. OHNO, K. SAIKUSA*, T. AITA*, A. OHTOMO* AND M.
KAWASAKI*, TOHOKU UNIV. AND *TOKYO INST, OF TECHNOL., JAPAN 132 14:30
(4) RECENT PROGRESS IN SIC ION IMPLANTATION ANDMOS TECHNOLOGIES FOR HIGH
POWER DEVICES (INVITED) T. KIMOTO, H. YANO AND H. MATSUNAMI, KYOTO
UNIV., JAPAN 134 15:00 (5) PASSIVATION OF DEEP LEVELS IN 3C-SIC ON SI BY
A HYDROGEN PLASMA TREATMENT M. KATO, F. SOBUE, M. ICHIMURA, E. ARAI, N.
YAMADA*, Y. TOKUDA** AND T. OKUMURA***, NAGOYA INST, OF TECHNOL.,
*TOYOTA CENTRAL RES. AND DEVELOP. LABS., **AICHI INST, OF TECHNOL. AND
***TOKYO METROPOLITAN UNIV., JAPAN 136 15:15 (6) RADIATION HARDNESS OF
EPITAXIAL AND NON-EPITAXIAL 6H-SIC MOS CAPACITORS E.A. DE VASCONCELOS,
E.F. DA SILVA JR., T. KATSUBE*, S. YOSHIDA* AND Y. NISHIOKA**, UNIV.
FEDERAL DE PERNAMBUCO, BRAZIL, *SAITAMA UNIV. AND ** TI TSUKUBA RES. AND
DEVELOP. CENTER, JAPAN 138 E-2: WIDEGAP SEMICONDUCTOR MATERIALS AND
DEVICES -GAN DEVICES- (15:45-17:30) 15:45 (1) PHYSICS OF GAN BASED
ELECTRONIC DEVICES (INVITED) M.S. SHUR, R. GASKA* AND A. KHAN**,
RENSSELAER POLYTECHNIC INST., *SENSORELECTRONIC TECHNOL. AND **UNIV. OF
SOUTH CAROLINA, USA 140 16:15 (2) COMPUTATIONAL CHEMISTRY STUDY ON
CRYSTAL GROWTH PROCESS OFINGAN/GAN Y. INABA, T. ONOZU, S. TAKAMI, M.
KUBO, A. MIYAMOTO AND A. IMAMURA*, TOHOKU UNIV. AND HIROSHIMA KOKUSAI
GAKUIN UNIV., JAPAN 142 16:30 (3) ELECTRONIC STRUCTURE OF INGAN QUANTUM
DOTS IN GAN: ATOMIC SCALE CALCULATIONS T. SAITO AND Y. ARAKAWA, UNIV. OF
TOKYO, JAPAN 144 16:45 (4) THE STUDY OF METAL-GAN INTERFACE OF SCHOTTKY
CONTACTS WITH DIFFERENT METALS S.J. CHANG, F.S. JUANG*, Y.K. SU AND Y.C.
CHIOU, NATIONAL CHENG KUNG UNIV. AND NATIONAL HUWEI INST, OF TECHNOL.,
TAIWAN 146 17:00 (5) THE STUDY OFGAN AND INGAN
METAL-SEMICONDUCTOR-METALPHOTODETECTORS WITH DIFFERENT SCHOTTKY CONTACT
METALS Y.K. SU, F.S. JUANG*, S.J. CHANG, Y.C. CHIOU AND J.K. SHIU,
NATIONAL CHENG KUNG UNIV. AND *NATIONAL HUWEI INST, OF TECHNOL., TAIWAN
148 * XXM * 17:15 (6) ALGAN/GAN HETEROJUNCTION HIGH ELECTRON MOBILITY
TRANSISTORS USING GA-POLARITY CRYSTAL GROWTH BY PLASMA-ASSISTED
MOLECULAR BEAM EPITAXY T. IDE, M. SHIMIZU*, A. SUZUKI**, X.-Q. SHEN*. H.
OKUMURA* AND T. NEMOTO, MEIJI UNIV., *ETL AND **TOKAI UNIV., JAPAN 150
LE-1: LATE NEWS 17:30 (1) VERY-LARGE-GAIN COLLECTOR-UP GAN/W/W03 METAL
BASE TRANSISTORS K. MOCHIZUKI, K. UESUGI*, P.M. ASBECK**, J. GOTOH, T.
MISHIMA, K. HIRATA*** AND H. ODA***, HITACHI, *HOKKAIDO UNIV., JAPAN,
**UNIV. OF CALIFORNIA, USA AND ***HITACHI ULSI SYSTEMS, JAPAN 152 17:45
(2) RECESSED GATE ALGAN/GANHEMT ON SAPPHIRE GROWN BYMOCVD T. EGAWA, H.
ISHIKAWA, G. ZHAO AND M. UMENO, NAGOYA INST, OF TECHNOL., JAPAN ... 154
AUGUST 30, WEDNESDAY ROOMA A-3: PROCESS/MATERIALS TECHNOLOGIES -DRAM
PROCESS I- (9:30-10:30) 9:00 (1) INFLUENCE OF LATTICE DISTORTION AND
OXYGEN DEFECTS IN BST FILMS FORMEMORY CAPACITORS (INVITED) N. FUKUSHIMA,
K. ABE, S. NIWA, T. AOYAMA, M. KIYOTOSHI, S. YAMAZAKI, M. IZUHA, K.
EGUCHI, K. HIEDA AND T. ARIKADO, TOSHIBA, JAPAN 156 9:30 (2)
INDUCTIVE-COUPLED RF MAGNETRON PLASMA DEPOSITION OF (BA, SR)TI03 FOR
DECOUPLING CAPACITORS N. FUJIWARA, T. KIKKAWA, S. MIYAZAKI, F. NISHIYAMA
ANDM. HIROSE, HIROSHIMA UNIV., JAPAN 158 9:45 (3) GAS PHASE REACTIONS IN
THEMOCVD OF (BA,SR)TI03 FILMS:A STUDY BY MICRODISCHARGE OPTICAL EMISSION
SPECTROSCOPY S. MOMOSE, T. NAKAMURA AND K. TACHIBANA, KYOTO UNIV., JAPAN
160 10:00 (4) EFFECTS OF STEP COVERAGE, CI CONTENT AND DEPOSITION
TEMPERATURE IN TIN TOP ELECTRODE ON THE RELIABILITY OFTA205 AND A1203
MIS CAPACITOR FOR 0.13 PM TECHNOLOGY AND BEYOND H.S. LIM, S.B. KANG,
I.S. JEON, G.H. CHOI, Y.W. PARK, S.I. LEE AND J.T. MOON, SAMSUNG
ELECTRONICS, KOREA 162 10:15 (5) SUPPRESSION OF STORAGE NODE CONTACT
DISTORTION FOR GIGABIT-SCALEDRAM WITH COB STRUCTURE D.H. KIM, H. JEOUNG,
H.S. KIM, J.H. PARK, K.H. YEOM, S.Y. KIM, J.M. PARK, T.K. KIM, J.S. KIM,
D.K. PARK, Y.J. PARK AND J.W. PARK, SAMSUNG ELECTRONICS, KOREA 164 A-4:
SILICON PROCESS/MATERIALS TECHNOLOGIES -DRAM PROCESS II- (10:45-12:00)
10:45 (1) OPTIMISATION OF COSI2 BASED ELECTRICAL FUSES FOR REDUNDANCY
IMPLEMENTATION IN SUB- 0.13 FIM EMBEDDEDDRAM APPLICATIONS C.
KOTHANDARAMAN, S.K. IYER*, J.J. WU* AND S.S. IYER*, INFINEON TECHNOL.
AND *IBM, USA 166 11:00 (2) AN EXPERIMENTAL STUDY OF RELIABILITY
IMPROVEMENT OF A SEMICONDUCTOR MEMORY DEVICE WITH A NOVEL SELF-PROTECTED
FUSE-BOX TECHNIQUE USING A POLY-SI ETCH STOPPER C.-H. LEE, Y.-H. PARK,
M.-H. HAN, E.-Y. MIN, W.-H. JANG AND W.-S. LEE, SAMSUNG ELECTRONICS,
KOREA 168 11:15 (3) REVERSE SHORT CHANNEL EFFECTS IN SHALLOW TRENCH
ISOLATED MOSFET H. LIM, J.-M. YOUN, S.J. HONG, J.-H. KIM, K.-J. KIM AND
K.-T. KIM, SAMSUNG ELECTRONICS, KOREA 170 11:30 (4) AN ADVANCED ROOM
TEMPERATURE CLEANING USING A PH CONTROLLED OZONATED ULTRAPURE WATER I.
YOKOI, G.-M. CHOI AND T. OHMI, TOHOKU UNIV., JAPAN 172 * XXIV * 11:45
(5) STRATEGY IN CLEANING PROCESSES FOR FUTURE MATERIALS G.-M. CHOI, F.
PIPIA AND T. OHMI, TOHOKU UNIV., JAPAN 174 A-5: SILICON
PROCESS/MATERIALS TECHNOLOGIES -GATE INSULATOR- (13:30-15:30) 13:30 (1)
ULTRA-THIN SILICON OXYNITRIDE FILM GROWN AT LOW-TEMPERATURE BY
MICROWAVE-EXCITED HIGH-DENSITY KR/02/N2 PLASMA K. OHTSUBO, Y. SAITO, K.
SEKINE, M. HIRAYAMA, S. SUGAWA, H. AHARONI AND T. OHMI, TOHOKU UNIV.,
JAPAN 176 13:45 (2) HIGH PERFORMANCENMOS DEVICES USING ULTRA-THIN VHP
OXYNITRIDE . T.Y. LUO, H.N. AL-SHAREEF*, A. KARAMCHETI*, V.H.C. WATT*,
G.A. BROWN*, M.D. JACKSON*, H.R. HUFF*, B. EVANS** AND D.L. KWONG, UNIV.
OF TEXAS, *INTERNATIONAL SEMATECH AND **GASONICS INTERNATIONAL, USA 178
14:00 (3) ULTRATHIN FLUORINATED SILICON NITRIDE GATE DIELECTRIC FILMS
FORMED BY PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION EMPLOYING NH3 AND
SIF4 H. OHTA, A. NAGASHIMA, M. HORI AND T. GOTO, NAGOYA UNIV., JAPAN 180
14:15 (4) NOVELNITROGEN PROFILE CONTROL TECHNOLOGYIN ULTRATHIN GATE
OXIDE FOR DEEP SUBMICRON CMOS T. OGURA, H. KOTAKI, S. KAKIMOTO, S.
ZAIMA* AND Y. YASUDA*, SHARP AND *NAGOYA UNIV., JAPAN 182 14:30 (5) LOW
TEMPERATURE GATE OXIDATIONMOS TRANSISTOR PRODUCED BY KR/02 MICROWAVE
EXCITED HIGH-DENSITY PLASMA T. HAMADA, Y. SAITO, K. SEKINE, H. AHARONI
AND T. OHMI, TOHOKU UNIV., JAPAN 184 14:45 (6) DUAL-THICKNESS GATE
OXIDATION TECHNOLOGY WITH HALOGEN/XENON IMPLANTATION FOR EMBEDDED DRAMS
T. SUGIZAKI, A. MURAKOSHI*, Y. OZAWA*, T. NAKANISHI AND K. SUGURO*,
FUJITSU LABS. AND *TOSHIBA, JAPAN 186 15:00 (7) IMPACTS OF CHLORINE IN
CVD-TIN GATE ELECTRODE ON THE GATE OXIDE RELIABILITY IN
MULTIPLE-THICKNESS OXIDE TECHNOLOGY M. MORIWAKI AND T. YAMADA,
MATSUSHITA ELECTRONICS, JAPAN 188 15:15 (8) BORON DIFFUSION IN SI02
INVOLVING HIGH-CONCENTRATION EFFECTS T. AOYAMA, H. ARIMOTO AND K.
HORIUCHI, FUJITSU LABS., JAPAN 190 A-6: SILICON PROCESS/MATERIALS
TECHNOLOGIES -DEPOSITION AND ETCHING- (13:30-15:30) 15:45 (1) PRECISE
CD-CONTROLLED GATE ETCHING USING UHF-ECR PLASMA M. MORI, N. ITABASHI, H.
ISHIMURA, H. AKIYAMA, T. FUJII, G. SAITO, M. YOSHIGAI*, M. KOJIMA, K.
OKAMOTO**, K. TSUJIMOTO AND S. TACHI, HITACHI, *HITACHI TECHNO ENG. AND
**HITACHI ULSI SYSTEMS, JAPAN 192 16:00 (2) ETCH DAMAGE OF N+POLY-SI
GATE SIDE WALL AS EVALUATED BY GATE TUNNEL LEAKAGE CURRENT H. MURAKAMI,
T. MIHARA, S. MIYAZAKI AND M. HIROSE, HIROSHIMA UNIV., JAPAN 194 16:15
(3) PERFECTLY ETCHING UNIFORMITYCONTROL OFVARIOUSDOPED OXIDE FILMS USING
AN ANHYDROUS HFGAS H. ARAKAWA, Y. SHIRAI AND T. OHMI, TOHOKU UNIV.,
JAPAN 196 16:30 (4) THEORETICAL STUDY ON THE FORMATION PROCESS OF EMPTY
SPACE IN SILICON (ESS) K. MITSUTAKE AND Y. USHIKU, TOSHIBA, JAPAN 198
16:45 (5) IMPURITY MEASUREMENT IN SPECIALTY GASES USING ATMOSPHERIC
PRESSURE IONIZATION MASS SPECTROMETER WITH TWO COMPARTMENTS ION SOURCE
M. KITANO, Y. SHIRAI, A. OHKI* AND T. OHMI, TOHOKU UNIV., AND
*OSAKASANSO KOGYO, JAPAN 200 17:00 (6) LOW-TEMPERATURE SELECTIVE
DEPOSITION OF SILICON BY TIME-MODULATION EXPOSURE OF DISILANE AND
FORMATION OF SILICON NANOWIRES S. YOKOYAMA, K. OHBA, K. KAWAMURA, T.
KIDERA AND A. NAKAJIMA, HIROSHIMA UNIV., JAPAN 202 17:15 (7) CHANNEL
WIDTH DEPENDENCE OF MOBILITY IN GE CHANNEL MODULATION DOPED STRUCTURES
T. IRISAWA, H. MIURA, T. UENO AND Y. SHIRAKI, UNIV. OF TOKYO, JAPAN 204
17:30 (8) IN-SITU IMPURITY DOPING IN SI1_X_YGEXC , EPITAXIAL GROWTH
USING ULTRACLEAN LPCVD D. LEE, T. NODA, H. SHIM, M. SAKURABA, T.
MATSUURA AND J. MUROTA, TOHOKU UNIV., JAPAN 206 * XXV * ROOM B B-3:
ADVANCED SILICON DEVICES AND DEVICE PHYSICS III (9:00-10:30) 9:00 (1)
EDGE DIRECT TUNNELING (EDT) INDUCED DRAIN AND GATE LEAKAGE IN ULTRATHIN
GATE OXIDE MOSFETS K.N. YANG, H.T. HUANG, M.J. CHEN, Y.M. LIN*, M.H.
YU*, S.M. JANG*, C.H. YU* AND M.S. LIANG*, NATIONAL CHIAO TUNG UNIV. AND
*TSMC, TAIWAN 208 9:15 (2) QUANTITATIVE EVALUATION OF QUANTUM MECHANICAL
INFLUENCE ON FLAT-BAND CAPACITANCE OF POLY-SI/SI02/SI SUBSTRATE SYSTEM
AND THE IMPACT OF OXIDE CHARGE DENSITY A. SHIMIZU AND Y. OMURA, KANSAI
UNIV., JAPAN . 210 9:30 (3) MODELING OF THE SERIES RESISTANCE FOR BELOW
LOONM MOSFET REGIME S.-D. KIM, C.-M. PARK AND J.C.S. WOO, UNIV. OF
CALIFORNIA, USA 212 9:45 (4) COMPACT EXPRESSIONS FOR CROSSTALK OF
MULTIPLE BIT LINES INDRAM H. LIN, Y.-T. LAI AND S.-C. WONG*, NATIONAL
CHUNG HSING UNIV. AND *TSMC, TAIWAN 214 10:00 (5) STATISTICAL THRESHOLD
FLUCTUATIONS IN SI-MOSFETS: JELLIUM VS. ATOMISTIC DOPANT VARIATIONS N.
SANO, M. TOMIZAWA* AND K. NATORI, UNIV. OF TSUKUBA AND *NTT, JAPAN 216
10:15 (6) CHARACTERISTIC OF ELECTRON PUMPS BASED ON SILICON COULOMB
BLOCKADE DEVICES T. ALTEBAEUMER AND H. AHMED, UNIV. OF CAMBRIDGE, UK 218
B-4: ADVANCED SILICON DEVICES AND DEVICE PHYSICS IV (10:45-11:15) 10:45
(1) THE VERTICAL REPLACEMENT-GATE (VRG) MOSFET: A HIGH-PERFORMANCE
VERTICAL MOS FET WITH LITHOGRAPHY-INDEPENDENT CRITICAL DIMENSIONS
(INVITED) J. HERGENROTHER AND D. MONROE, BELL LABS., LUCENT TECHNOLOGIES
USA 220 LB-1: LATE NEWS 11:15 (1) PLASMA CHARGINGDAMAGE IMMUNITY IN SOI
DEVICES M. KHARE, A. MOCUTA, E. LEOBANDUNG, T. CHOU, B. LINDER, W.
RAUSCH, P. AGNELLO, F. ASSADERAGHI, L.T. SU, G. SHAHIDI AND T.-C. CHEN,
IBM, USA 222 11:30 (2) REDUCTION OF R0N IN VERTICAL POWER-MOSFETS DUE TO
LOCAL CHANNEL DOPING C. FINK, J. SCHULZE, I. EISELE,W. HANSEN*, W.
WERNER** ANDW. KANERT**, UNIV. OFTHE GERMAN FEDERALARMED FORCES,
*TECHNICAL UNIV. OF MUNICH AND **INFINEON TECHNOLS., GERMANY 224 B-5:
NEW MATERIALS AND CHARACTERIZATION -HIGH K GATE DIELECTRICS-
(13:30-15:30) 13:30 (1) A COMPARISON OF SI02-BASED ALLOYS AS HIGH
PERMITTIVITY GATE OXIDES (INVITED) A.I. KINGON AND J.-P. MARIA, NORTH
CAROLINA STATE UNIV., USA 226 14:00 (2) STUDY ON ZR-SILICATE INTERFACIAL
LAYER OFZRORMIS STRUCTURE FABRICATED BY PULSED LASER ABLATION DEPOSITION
METHOD T. YAMAGUCHI, H. SATAKE AND A. TORIUMI, TOSHIBA, JAPAN 228 14:15
(3) CHARGE TRAPPING IN SIOX/ZR02 GATE DIELECTRIC STACKS M. HOUSSA, M.
NAILI*, M.M. HEYNS* AND A. STESMANS, KATHOLIEKE UNIV. LEUVEN AND *IMEC,
BELGIUM 230 14:30 (4) CHEMICAL BONDING AT INTERFACES BETWEEN SI (100)
AND HIGH-K DIELECTRICS: COMPETING EFFECTS OF I) PROCESS GAS-SUBSTRATE
AND II) FILM DEPOSITION REACTIONS G. LUCOVSKY, H. NIIMI, R. JOHNSON,
J.G. HONG, R. THERRIEN AND B. RAYNER, NORTH CAROLINA STATE UNIV., USA
232 14:45 (5) DEGRADATION OF TA205 GATE DIELECTRIC BY TICI*-BASED
CHEMICALLY VAPOR DEPOSITED TIN FILM IN W/TIN/TA203/SI SYSTEM J.W. LEE,
C.H. HAN, J.-S. PARK AND J.W. PARK, HYUNDAI ELECTRONICS, KOREA 234 15:00
(6) HIGH QUALITY ULTRATHIN TAOXNY GATE DIELECTRIC PREPARED BY
NITRIDATION OF TA205 H. JUNG, K. IM, S. JEON, D. YANG* AND H. HWANG,
KJIST AND *JUSUNG ENG., KOREA.. .236 * XXVI * 15:15 (7) TAOXNY GATE
DIELECTRIC WITH IMPROVED THERMAL STABILITY H.-J. CHO, D.-G. PARK, I.-S.
YEO, J.-S. ROH AND J.-M. HWANG, HYUNDAI ELECTRONICS, KOREA 238 B-6: NEW
MATERIALS AND CHARACTERIZATION -GATE OXIDE RELIABILITY- (15:45-17:30)
15:45 (1) INTRINSIC LIMITATIONS ON ULTIMATE DEVICE PERFORMANCE AND
RELIABILITY FROM TRANSITION REGIONS AT I) SI-DIELECTRIC INTERFACES AND
II) INTERNAL INTERFACES G. LUCOVSKY, NORTH CAROLINA STATE UNIV., USA 240
16:00 (2) THE POLARITY DEPENDENCE OF SOFT-BREAKDOWN CHARACTERIZATION FOR
ULTRA-THIN GATE OXIDES AFFECTED BY NITROGEN AND FLUORINE C.S. LAI AND
T.S. CHAO*, CHANG GUNG UNIV. AND *NATIONAL NANO DEVICE LAB., TAIWAN 242
16:15 (3) TEMPERATURE-DEPENDENT SOFT BREAKDOWN IN ULTRATHIN GATE OXIDES
W. MIZUBAYASHI, Y. YOSHIDA, M. NARASAKI, S. MIYAZAKI AND M. HIROSE,
HIROSHIMA UNIV., JAPAN 244 16:30 (4) A NOVEL SPHERE-BASED
STATISTICALMODEL FOR LOCAL OXIDE THINNING INDUCED GATE OXIDE BREAKDOWN
H.-T. HUANG AND M.-J. CHEN, NATIONAL CHIAO TUNG UNIV., TAIWAN 246 16:45
(5) IMPACT OFTDDB DISTRIBUTION FUNCTION ON LIFETIMEESTIMATION IN
ULTRA-THIN GATE OXIDES H. SATAKE AND A. TORIUMI, TOSHIBA, JAPAN 248
17:00 (6) GATE OXIDE RELIABILITY CONCERN ASSOCIATED WITH X-RAY
LITHOGRAPHY B.J. CHO, S.J. KIM, C.H. ANG, C.H. LING, M.S. JOO* AND I.S.
YEO*, NATIONAL UNIV. OF SINGAPORE, SINGAPORE AND *HYUNDAI ELECTRONICS,
KOREA 250 17:15 (7) MICROSCOPIC OBSERVATION OF X-RAY IRRADIATION DAMAGES
IN ULTRA-THIN SI02 FILMS K. OHMORI, T. GOTO, H. IKEDA, A. SAKAI, S.
ZAIMA AND Y. YASUDA, NAGOYA UNIV., JAPAN 252 17:30 (8) A STRONG
TEMPERATURE-DEPENDENT HOLE DIRECT TUNNELING CURRENT IN P+-GATE/PMOSFET
WITH ULTRA-THIN GATE OXIDE C.-H. ANG, C.-H. LING, Z.-Y. CHENG AND B.-J.
CHO, NATIONAL UNIV. OF SINGAPORE, SINGAPORE 254 ROOM C C-3: NON-VOLATILE
MEMORIES -FERAM I- (9:00-10:30) 9:00 (1) THE ROLE OF DOMAINS IN LONGTERM
RELIABILITY (INVITED) J.T. EVANS, RADIANT TECHNOLOGIES, USA 256 9:30 (2)
HYDROGEN-ROBUST SUBMICRON IROX/PZT/IR CAPACITORS FOR EMBEDDED
FERROELECTRIC MEMORY (INVITED) T. SAKODA T.S. MOISE, S.R. SUMMERFELT, L.
COLOMBO, G. XING, S.R. GILBERT*, A.L.S. LOKE*, S. MA*, R. KAVARI*, L.A.
WILLS AND J. AMANO*, TEXAS INSTRUMENTS AND *AGILENT TECHNOLOGIES, USA
258 10:00 (3) NONVOLATILE
METAL-FERROELECTRIC-METAL-INSULATOR-SEMICONDUCTOR(MFMIS)-FETS USING
PT/SRBI2TA209/PT/SRTA206/SION/SI STRUCTURES OPERATING AT 3.5V E,
TOKUMITSU, K. OKAMOTO AND H. ISHIWARA, TOKYO INST, OF TECHNOL., JAPAN
260 10:15 (4) CHARACTERIZATION OF FERROELECTRIC DOMAIN BEHAVIOR
INMOCVD-PZT CAPACITORS FOR CMVP FERAMS K. ITO, Y. MOCHIZUKI, T. TATSUMI,
N. INOUE, H. HADA, T. HASE AND Y. MIYASAKA, NEC, JAPAN 262 C-4:
NON-VOLATILE MEMORIES -FERAM II- (10:45-12:15) 10:45 (1) SPM STUDIES OF
HYDROGEN-INDUCED DEGRADATION OF PT/PLZT/PT CAPACITORS C. YOSHIDA, T.
TAMURA, K. KONDO* AND K. TAKASAKI*, FUJITSU AND *FUJITSU LABS., JAPAN
264 * XXVII * 11:00 (2) PB CONTENT CONTROL IN SPUTTERED PZT FILMS FOR
FRAM MASS PRODUCTION S. OZAWA, S. MIHARA, H. NOSHIRO, Y. HORII, M.
SHIBATA, T. TAKAMATSU, M. NAKAMURA Y. NISHIOKA*, T. MASUDA*, Y.
MIYAGUCHI*, N. TANI*, K. SUU* AND T. YAMAZAKI, FUJITSU AND *ULVAC, JAPAN
266 11:15 (3) STUDIES ON IMPROVING RETENTION TIME OF MEMORIZED STATE
OFMFIS STRUCTURE FOR FERROELECTRIC GATE FET MEMORY M. TAKAHASHI, H.
SUGIYAMA, T. NAKAISO, M. NODA ANDM. OKUYAMA, OSAKA UNIV., JAPAN 268
11:30 (4) A NOVEL SPICE MODEL OF FERROELECTRIC CAPACITORS USING SCHMITT
TRIGGER CIRCUIT S. YAMAMOTO, T. KATO AND H. ISHIWARA, TOKYO INST, OF
TECHNOL., JAPAN 270 11:45 (5) LOW-TEMPERATURE PREPARATION OF
FERROELECTRIC SR2(TA].X) NBX)207 THIN FILMS BY PULSED LASER DEPOSITION
AND THEIR APPLICATION TO MFIS STRUCTURE T. NAKAISO, M. NODA AND M.
OKUYAMA, OSAKA UNIV., JAPAN 272 12:00 (6) ELECTRICAL CHARACTERISTICS OF
PT/SRBI2TA209/TA205/SI USING TA205 AS THE BUFFER LAYER H.S. CHOI, K.S.
PARK, Y.T. KIM* AND I.-H. CHOI, KOREA UNIV. AND *KIST, KOREA ... .274
C-5: NON-VOLATILE MEMORIES -FLASH I- (13:30-15:30) 13:30 (1) TECHNOLOGY
CONSIDERATIONS FOR HIGH-SPEED HIGH-DENSITY EMBEDDED FLASH (INVITED)
K.-M. CHANG, MOTOROLA, USA 276 14:00 (2) A NOVEL P-CHANNEL FLASH EEPROM
CELL WITH SIMPLE PROCESS AND LOW POWER CONSUMPTION C.J. HUANG, Y.C. LIU,
S.F. HONG, A. WU, M.C. WANG, S. HSU, L.C. HSIA, Y.J. CHANG, Y.T. LO AND
F.-T. LIU, UNITED MICROELECTRONICS, TAIWAN 278 14:15 (3) ELECTRICAL
CHARACTERIZATION OF A TRIPLE SELF-ALIGNED SPLIT-GATE FLASH CELL FOR 0.18
/AN EMBEDDED APPLICATION J. YAN, C. GRUENSFELDER, A. SCHMIDT, K. KIM, R.
MIH*, J. HARRINGTON*, K. HOULIHAN*, H.K. LEE*, K. CHAN*, J. JOHNSON*, B.
CHEN*, C. LO**, D. LEE**, A. LEVI**, C. LAM* AND D. SHUM, INFINEON
TECHNOLOGIES, *IBM AND **SILICON STORAGE TECHNOL., USA .... 280 14:30
(4) A NEW DUAL FLOATING GATE FLASH CELL FOR MULTILEVEL OPERATION J.T.-Y.
CHEN, H. LIN AND S.-C. WONG*, NATIONAL CHUNG HSING UNIV. AND *TSMC,
TAIWAN 282 14:45 (5) A BODY EFFECT ASSISTED NOR-TYPE (BENOR) MULTILEVEL
FLASH MEMORY Y.-S. WANG, H.-P. TSAI, E.C.-S. YANG, Y.-C. KING, S. CHEN*
AND C.C.-H. HSU, NATIONAL TSING HUA UNIV. AND *WINBOND ELECTRONICS,
TAIWAN 284 15:00 (6) AUGER RECOMBINATION ENHANCED HOT ELECTRON
PROGRAMMING IN FLASH EEPROMS N.K. ZOUS, L.P. CHIANG, C.W. TSAI AND T.
WANG, NATIONAL CHIAO TUNG UNIV., TAIWAN 286 15:15 (7) ON THE CAPACITANCE
COUPLING RATIOS OF A SOURCE-SIDE INJECTION FLASH MEMORY CELL1 C.-M. LIU,
J. BRENNAN, JR., K. CHAN, P. GUO, A.V. KORDESCH AND K.-Y. SU, WINBOND
ELECTRONICS, USA 288 C-6: NON-VOLATILE MEMORIES -FLASH II- (15:45-16:45)
15:45 (1) CHARACTERISTICS OF TUNNELING NITRIDE GROWN BY ELECTRON
CYCLOTRON RESONANCE NITROGEN PLASMA NITRIDATION AND ITS APPLICATION TO
LOW VOLTAGE EEPROM K.-S. MIN AND K. LEE*, HYUNDAI ELECTRONICS AND
*KAIST, KOREA 290 16:00 (2) ANALYSIS OF GATE DISTURB DEGRADATION BY
NITRIDATION OF FLASH TUNNEL OXIDE M. ARAI, T. HASHIDZUME, T. NITTA, Y.
ODAKE AND I. MATSUO, MATSUSHITA ELECTRONICS, JAPAN 292 16:15 (3)
SIMULATIONOFPOSITIVE OXIDE TRAPPED CHARGE INDUCEDLEAKAGE CURRENT AND
READ-DISTURB IN FLASH EEPROMS N.K. ZOUS, C.W. TSAI, L.P. CHIANG, C.C.
YEH AND T. WANG, NATIONAL CHIAO TUNG UNIV., TAIWAN 294 16:30 (4)
SCREENING FOR FLASH CELLS WITH RETENTION RELATED DEFECTS D. GIARDINI AND
F.P. SCARLATA, STMICROELECTRONICS, ITALY 296 * XXVUI * LC-1: LATE NEWS
16:45 (1) ENDURANCE ENHANCEMENT IN /M CROFLASH MEMORY DEVICE E. ALONI,
M. GUTMAN, Y. ROIZIN, D. FINZI, C.I. HYUN, *I. BLOOM, *D. LEVY, *A. LANN
AND *P. PAVAN, TOWER SEMICONDUCTOR AND *SAIFUN SEMICONDUCTOR, ISRAEL 298
17:00 (2) EVALUATION OF SRBI2(TAXNB,.X)209(SBTN) CRYSTALLIZATION
TECHNIQUE AT 650C K. NAKAMURA, H. YAMAWAKI AND S. OTANI, FUJITSU LABS.,
JAPAN 300 17:15 (3) FABRICATION AND CHARACTERIZATION OFPT/(BI,
LA)4TI3012/SI3N4/SI MFIS STRUCTUREFORFET- TYPE FERROELECTRICMEMORY
APPLICATIONS T. KIJIMA, Y. FUJISAKI AND H. ISHIWARA, TOKYO INST, OF
TECHNOL., JAPAN 302 ROOMD D-3: NOVEL DEVICES, PHYSICS AND FABRICATION
-SINGLE ELECTRON DEVICES II- (9:00-10:30) 9:00 (1) ANALOG COMPUTATION
USING A QUANTUM-DOT CELL NETWORK N.-J. WU, K. SAITO AND H. YASUNAGA*,
UNIV. OF AIZU AND *UNIV. OF ELECTRO- COMMUNICATIONS, JAPAN 304 9:15 (2)
A MULTI-QUANTUM-DOT ASSOCIATIVE CIRCUIT USING THERMAL-NOISE ASSISTED
TUNNELING T. MATSUURA, T. MORIE, M. NAGATA AND A. IWATA, HIROSHIMA
UNIV., JAPAN 306 9:30 (3) SINGLE FAR-INFRARED PHOTON DETECTION USING AN
SET (INVITED) O. ASTAFIEV, V. ANTONOV, T. KUTSUWA AND S. KOMIYAMA, UNIV.
OF TOKYO, JAPAN 308 10:00 (4) SINGLE FIR-PHOTON DETECTION USING AN
RF-SET T. KUTSUWA, V. ANTONOV*, O. ASTAFIEV* AND S. KOMIYAMA, UNIV. OF
TOKYO AND *JST, JAPAN 310 10:15 (5) NOVEL SINGLE ELECTRON MEMORY DEVICE
USING METAL NANO-DOTS AND SCHOTTKY IN-PLANE GATE QUANTUM WIRE
TRANSISTORS H. OKADA AND H. HASEGAWA, HOKKAIDO UNIV., JAPAN 312 D-4:
QUANTUM SEMICONDUCTOR MATERIALS AND DEVICES -QUANTUM DOTS- (10:45-12:15)
10:45 (1) SUPERLATTICE- AND ULTRASHORT-CHANNEL FIELD EFFECT TRANSISTORS
FABRICATED BY CLEAVED EDGE OVERGROWTH (INVITED) R.A. DEUTSCHMANN,W.
WEGSCHEIDER*, F. ERTL, T. ASPERGER,M. ROTHER, M. BICHLER AND G.
ABSTREITER, TECHNISCHE UNIV. MIINCHEN AND *UNIV. REGENSBURG, GERMANY 314
11:15 (2) LASING CHARACTERISTICS AND CARRIER DYNAMICS OF 1.3-/UM
INGAAS/GAAS QUANTUM DOT LASERS Y. NAKAGAWA, M. SUGAWARA, K. MUKAI*, Y.
NAKATA* AND H. ISHIKAWA, TOKYO INST, OF TECHNOL. AND *FUJITSU LABS.,
JAPAN 316 11:30 (3) INAS SELF-ASSEMBLED QUANTUM DOTS COUPLED WITH GASB
MONOLAYER QUANTUM WELL M. YAMAGUCHI, Y. SUGIYAMA, Y. NAKATA, T.
OHSHIMA*, H. SASAKURA**, S. MUTO**, Y. AWANO AND N. YOKOYAMA, FUJITSU,
*FUJITSU LABS, AND **HOKKAIDO UNIV., JAPAN 318 11:45 (4) A MODEL OF
CARRIER CAPTURING AND RECOMBINATION PROCESS IN QUANTUM-DOT SYSTEM:
INFLUENCE OF EXCITATION POWER ON SPONTANEOUS EMISSION INTENSITY AND
LIFETIME K. MUKAI, Y. NAKATA AND M. SUGAWARA, FUJITSU LABS., JAPAN 320
12:00 (5) MEMORY OPERATION OF INAS QUANTUM DOT FIELD EFFECT TRANSISTOR
H. SON, J. KIM, M. KIM* AND S. HONG, KAIST AND *SAMSUNG ELECTRONICS,
KOREA 322 D-5: QUANTUM NANOSTRUCTURES/DEVICES/PHYSICS -QUANTUM
NANOSTRUCTURES- (13:30-15:30) 13:30 (1) ADDRESSING DISSIPATION PHENOMENA
IN SILICON QUANTUM DOTS (INVITED) R.H. BLICK, A. TILKE, L. PESCINI AND
H. LORENZ, UNIV. OF MUNICH, GERMANY 324 14:00 (2) BACK-GATED POINT
CONTACT K. HASHIMOTO, S. MIYASHITA*, T. SAKU AND Y. HIRAYAMA, NTT AND
*NTT-AT, JAPAN... 326 14:15 (3) RIDGE UNIFORMITY IMPROVEMENT TOWARD
GROWTH OF SUB-LONM INGAAS RIDGE QUANTUM WIRES BY SELECTIVEMBE ON
PATTERNED INP SUBSTRATE C. JIANG, T. MURANAKA AND H. HASEGAWA, HOKKAIDO
UNIV., JAPAN 328 * XXJX * 14:30 (4) UHV-STM STUDY OF ELECTRON EMISSION
FROM INDIVIDUAL SILICON NANOPILLARS P.A. LEWIS, B.W. ALPHENAAR* AND H.
AHMED, UNIV. OF CAMBRIDGE AND *HITACHI CAMBRIDGE LAB., UK 330 14:45 (5)
KELVIN PROBE FORCE MICROSCOPY FOR SURFACE POTENTIAL MEASUREMENTS ON INAS
NANOSTRUCTURES GROWN ON (110) GAAS VICINAL SUBSTRATES S. ONO, M.
TAKEUCHI* AND T. TAKAHASHI, UNIV. OF TOKYO AND *RIKEN, JAPAN 332 15:00
(6) CONTROL OF THERMAL EMISSION BY USING PERIODIC MICROSTRUCTURES A.
UEDA, F. KUSUNOKI, J. TAKAHARA AND T. KOBAYASHI, OSAKA UNIV., JAPAN 334
15:15 (7) SPHERICAL SIGE QUANTUM DOTS PREPARED BY THERMAL EVAPORATION
METHOD Y.-C. LIAO, S.-Y. LIN, S.-C. LEE AND C.-T. CHIA*, NATIONAL TAIWAN
UNIV. AND *N.N.U., TAIWAN 336 D-6: QUANTUM
NANOSTRUCTURES/DEVICES/PHYSICS -TUNNELING AND SPIN RELATED PHENOMENA-
(15:45-17:45) 15:45 (1) SPIN-POLARIZED CURRENT INJECTION IN
FERROMAGNETIC SEMICONDUCTOR HETEROSTRUCTURE (INVITED) Y. OHNO, D.K,
YOUNG*, B. BESCHOTEN*, F. MATSUKURA, H. OHNO AND D.D. AWSCHALOM*, TOHOKU
UNIV., JAPAN AND *UNIV. OF CALIFORNIA, USA 338 16:15 (2) FABRICATION OF
HOLLOW CYLINDER SHAPE PERMALLOY ON THE SI POLE Y.-G. HONG, N. NAKAMURA,
K.-T. PARK, M. SASAKI, H. KURINO, K. HANE AND M. KOYANAGI, TOHOKU UNIV.,
JAPAN 340 16:30 (3) THZ EMISSION DUE TO MINIBAND TRANSPORT IN
GAAS/ALGAAS SUPERLATTICES Y. SHIMADA, T. MATSUNO AND K. HIRAKAWA, UNIV.
OF TOKYO, JAPAN 342 16:45 (4) TERAHERTZ ELECTROMAGNETICWAVE GENERATION
FROMQUANTUM NANOSTRUCTURE I. MOROHASHI, K. KOMORI*, T. HIDAKA, T.
SUGAYA*. X.L. WANG*, M. OGURA* AND T. NAKAGAWA*, SHONAN INST, OF
TECHNOL. AND *ETL, JAPAN 344 17:00 (5) PHASE BREAKING EFFECT APPEARING
IN I-V CHARACTERISTICS OF DOUBLE-BARRIER RESONANT- TUNNELING DIODES
*THEORETICAL FITTING OVER FOUR ORDERS OF MAGNITUDE* M. NAGASE, K. FURUYA
AND N. MACHIDA, TOKYO INST, OF TECHNOL., JAPAN 346 17:15 (6) FORMATION
PROCESS OF HIGH-FIELD DOMAIN IN SUPERLATTICES OBSERVED BY
PHOTOLUMINESCENCE SPECTRA BRANCH M. HOSODA, N. OHTANI*, C. DOMOTO* AND
T. AIDA*, OSAKA CITY UNIV. AND *ATR, JAPAN 348 17:30 (7) NONLINEAR
DYNAMICS OF PERIODIC ELECTRIC-FIELD DOMAINS IN QUANTUM WELL INFRARED
PHOTODETECTORS M. RYZHII, V. RYZHII, R. SURIS* AND C. HAMAGUCHI**, UNIV.
OF AIZU, JAPAN, *A,F. IOFFE PHYSICAL-TECHNICAL INST. RAS, RUSSIA AND
**OSAKA UNIV., JAPAN 350 ROOM E-3: ADVANCED SILICON CIRCUITS AND
SYSTEMS I (9:00-10:30) 9:00 (1) FINGERPRINT IDENTIFICATION SYSTEM ON A
SINGLE CHIP BASED ON ADVANCED CIRCUIT AND DEVICE TECHNOLOGIES (INVITED)
S. SHIGEMATSU, H. MORIMURA, Y. TANABE, K. MACHIDA AND H. KYURAGI, NTT,
JAPAN... 352 9:30 (2) ELIMINATING NEEDLESS CALCULATIONS ON CIRCUIT
LEVEL: MOST-SIGNIFICANT-DIGIT-FIRST DIGIT- SERIAL PROCESSING T. NOZAWA,
M. IMAI, K. MOCHIZUKI AND T. OHMI, TOHOKU UNIV., JAPAN 354 9:45 (3) A
STACKED-CMOS LSI ARCHITECTURE FOR REDUCING OPERATION VOLTAGE AND CURRENT
M. NISHISAKA AND Y. OHTOMO, NTT, JAPAN 356 10:00 (4) A DYNAMICALLY
RECONFIGURABLE PROCESSOR WITH MULTI-MODE OPERATION BASED ON NEWLY
DEVELOPED FULL-ADDER/D-FLIP-FLOP MERGED MODULE (FDMM) S. SAKAIDANI, N.
MIYAMOTO AND T. OHMI, TOHOKU UNIV., JAPAN 358 10:15 (5) FAST AND COMPACT
CENTRAL ARBITER FOR HIGH ACCESS-BIT-RATE MULTI-PORT CACHES N. OMORI, K.
KISHI, T. GYOHTEN, J.KIM AND H.J. MATTAUSCH, HIROSHIMAUNIV., JAPAN...
360 * XXX * E-4: ADVANCED SILICON CIRCUITS AND SYSTEMS II (10:45-12:15)
10:45 (1) PROSPECTS OF IMPLANTABLE MICRO-SYSTEM TECHNOLOGY AND
EXPERIENCE IN THE ARTIFICIAL VISION SYSTEM (INVITED) W. LIU AND M.S.
HUMAYUN*, NORTH CAROLINA STATE UNIV., AND *JOHNS HOPKINS UNIV. USA 362
11:15 (2) A VMOS VISION CHIP BASED ON THE CELLULAR-AUTOMATON PROCESSING
T. SUNAYAMA, T. ASAI, Y. AMEMIYA ANDM. IKEBE*, HOKKAIDO UNIV. AND *DAI
NIPPON PRINTING, JAPAN 364 11:30 (3) A HIGH-RESOLUTION HADAMARD
TRANSFORM CIRCUIT USING PULSE WIDTH MODULATION TECHNIQUE K. KATAYAMA, M.
NAGATA, T. MORIE AND A. IWATA, HIROSHIMA UNIV., JAPAN 366 11:45 (4)
IMAGE OBJECT EXTRACTION USING RESISTIVE-FUSE AND OSCILLATOR NETWORKS AND
A PULSE- MODULATION CIRCUIT FOR THEIR LSI IMPLEMENTATION H. ANDO, T.
MORIE, M. MIYAKE, M. NAGATA AND A. IWATA, HIROSHIMAUNIV., JAPAN ... 368
12:00 (5) A NOVEL, LARGE-SCALE PACKET SWITCH SYSTEM AND 60 GBPS ARBITER
CIRCUIT OPERATION USING SFQ TECHNOLOGY S. YOROZU, Y. KAMEDA AND S.
TAHARA, NEC, JAPAN 370 E-5: LOW POWER CIRCUITS AND DEVICES (13:30-15:30)
13:30 (1) OPTIMUM DEVICE PARAMETERS AND SCALABILITY OFVARIABLE THRESHOLD
CMOS (VTCMOS) (INVITED) T. HIRAMOTO, M. TAKAMIYA, H. KOURA, T. INUKAI,
H. GOMYO, H. KAWAGUCHI AND T. SAKURAI, UNIV. OFTOKYO, JAPAN 372 14:00
(2) QUANTITATIVE STUDY OF AN SA-VTCMOS CIRCUIT: EVALUATION OF
FLUCTUATION IN DEVICE AND CIRCUIT PERFORMANCE G. ONO, M. MIYAZAKI AND K.
ISHIBASHI, HITACHI, JAPAN 374 14:15 (3) ULTRA-LOW STANDBY CURRENT IN
SOI-CMOS LSI CIRCUITS BY USING BODY-BIAS-CONTROL TECHNOLOGY K. HIGASHI,
T. OHMI*, A.O. ADAN, H. MORIMOTO, K. NIIMI, T. ASHIDAAND S. SUGAWA*,
SHARP AND *TOHOKU UNIV., JAPAN 376 14:30 (4) A 3.26 FIM2 FULLCMOS SRAM
CELL USING NON-OVERLAP CONTACTS FOR SUPER LOW POWER APPLICATIONS H.S.
HA, J.E. SONG, H.S. CHANG, K.H. LEE, S.G. KIM, K.J. KIM ANDK.T. KIM,
SAMSUNG ELECTRONICS, KOREA 378 14:45 (5) THREE-DIMENSIONAL CAPACITANCE
ANALYSIS IN AN SRAM CELL Y. TAKEMURA, K. OSADA, M. YAGYU, K. YAMAGUCHI,
J. USHIO AND T. MARUIZUMI, HITACHI, JAPAN 380 15:00 (6) LOW-POWER
AREA-EFFICIENT DESIGN OF PARALLEL PIPELINEA/D CONVERTERS D. MIYAZAKI AND
S. KAWAHITO, SHIZUOKA UNIV., JAPAN 382 15:15 (7) NOVELFFT LSI FOROFDM
USING CURRENT MODE CIRCUIT S.-K. KIM, J.-S. CHA, H. NAKASE AND K.
TSUBOUCHI, TOHOKU UNIV., JAPAN 384 E-6: HIGH-FREQUENCY/HIGH SPEED
DEVICES AND CIRCUITS (15:45-17:45) 15:45 (1) SELF-ALIGNED
SIGEHBTTECHNOLOGY FOR OPTICAL-FIBER-LINKS ANDMILLIMETER-WAVEAPPLICA
TIONS (INVITED) K. WASHIO, HITACHI, JAPAN 386 16:15 (2) EFFECT OF TI
SILICIDATION ONFMOX AND BASE RESISTANCE OF SIGE HETERO-JUNCTION BIPOLAR
TRANSISTORS S.-Y. LEE, H.-S. KIM, K.-H. SHIM AND J.-Y. KANG, ETRI, KOREA
388 16:30 (3) A NEW HIGH SPEED SWITCHING BIPOLAR POWER TRANSISTOR WITH
CORRUGATED BASE JUNCTIONS C. PARK, Y. YOON*, D.J. KIM* AND K. LEE, KAIST
AND *FAIRCHILD KOREA SEMICONDUCTOR, KOREA 390 16:45 (4) LOW VOLTAGE
ACTUATEDRFMEMS SWITCHES USING PUSH-PULL OPERATION D. HAH, E. YOON AND S.
HONG, KAIST, KOREA 392 * XXXI * 17:00 (5) FREQUENCY DISPERSION IN DRAIN
CONDUCTANCE OF INALAS/INGAAS HEMTS AND ITS CORRELATION WITH IMPACT
IONIZATION T. KOSUGI, Y. UMEDA, T. SUEMITSU, T. ENOKI AND Y. YAMANE,
NTT, JAPAN 394 17:15 (6) ACCURATE SMALL-SIGNAL MODELING AND PARAMETER
EXTRACTION FOR RF MOSFETS S. LEE, C.S. KIM* AND H.K. YU*, HANKUK UNIV.
OF FOREIGN STUDIES AND *ETRI., KOREA 396 17:30 (7) A SILICON RF-CMOS
CLASS-B PUSH-PULL POWER AMPLIFIER FOR IMT-2000 M. YOKOYAMA, R.
TACHIBANA, T. SAITO, K. MASU AND K. TSUBOUCHI, TOHOKU UNIV., JAPAN 398
AUGUST 31, THURSDAY ROOMA A-7: SILICON PROCESS/MATERIALS TECHNOLOGIES
-SHALLOW JUNCTIONS- (9:00-10:30) 9:00 (1) RETARDING MECHANISM OF SI
SELECTIVE EPITAXIAL GROWTH ON CMOS STRUCTURE DUE TO DOPED ARSENIC IN THE
SI SUBSTRATE K. MIYANO, I. MIZUSHIMA AND Y. TSUNASHIMA, TOSHIBA, JAPAN
400 9:15 (2) ULTRA SHALLOW JUNCTION FORMATION FOR 80NM CMOS BY
CONTROLLING TRANSIENT ENHANCED DIFFUSION K. OHUCHI, K. ADACHI, A.
MURAKOSHI, A. HOKAZONO, T. KANEMURA, N. AOKI, M. NISHIGOHRI, K. SUGURO
AND T. TOYOSHIMA, TOSHIBA, JAPAN 402 9:30 (3) CHARACTERISTICS OF BORON
AND ARSENIC ULTRA-SHALLOW JUNCTION USING LASER ANNEALING WITH
PRE-AMORPHIZATION IMPLANTATION CM. PARK, K. MIN, S.D. KIM, S.A. PRUSSIN,
M.K. HAN* AND J.C.S. WOO, UNIV. OF CALIFORNIA, USA AND *SEOUL NATIONAL
UNIV., KOREA 404 9:45 (4) ULTRA-SHALLOW AND LOW-LEAKAGE P+N JUNCTIONS
FORMATION BY PLASMA IMMERSION ION IMPLANTATION (PHI) AND LOW-TEMPERATURE
POST-IMPLANTATION ANNEALING K. KANEMOTO, H. AHARONI AND T. OHMI, TOHOKU
UNIV., JAPAN 406 10:00 (5) EFFECT OF SILICON SURFACE CONDITIONS BEFORE
COBALT-SILICIDATION ON ULTRA SHALLOW P -N JUNCTION PROPERTIES Y. SUGITA
AND K. GOTO, FUJITSU LABS., JAPAN 408 10:15 (6) THE FORMATION OF HIGH
TEMPERATURE STABLE CO-SILICIDE FROM COJ.XTAX/SI SYSTEMS D.-H. LEE, D.-H.
KO, H.-J. CHOI, J.-H. KU*, S. CHOI*, K. FUJIHARA*, H.-K. KANG*, S.-H.
OH**, C.-G. PARK** AND H.-J. LEE***, YONSEI UNIV., *SAMSUNG ELECTRONICS,
**POSTECH, KOREA AND ***STANFORD UNIV., USA 410 A-8: SYSTEM-LEVEL
PACKAGING TECHNOLOGIES I (10:45-12:00) 10:45 (1) CURRENT STATE OF
RESEARCH AND DEVELOPMENT FOR ELECTRONIC SYSTEM INTEGRATION (INVITED) M.
BONKOHARA, ASET, JAPAN 412 11:15 (2) INVESTIGATION OFALIVH SUBSTRATE
FOR HIGH FREQUENCY APPLICATION T. NAKAMURA, N. OKAZAKI*, H. HIGASHITANI,
T. SUGAWA, D. ANDOH, S. KOKUFU, Y. KAWAKITA, F. ECHIGO, Y. TAGUCHI, S.
IDA* AND K. FUKUOKA*, MATSUSHITA ELECTRIC AND MATSUSHITA ELECTRONIC
COMPONENTS, JAPAN 416 11:30 (3) INTERCONNECT AND SUBSTRATE STRUCTURE FOR
HIGH SPEED GIGA-SCALE INTEGRATION A. MORIMOTO, K. KOTANI, S. SUGAWA AND
T. OHMI, TOHOKU UNIV., JAPAN 418 11:45 (4) GHZ SIGNAL PROPAGATION
THROUGH TRANSMISSION LINE ON ULSI CHIP K. MASU AND K. TSUBOUCHI, TOHOKU
UNIV., JAPAN 420 A-9: SYSTEM-LEVEL PACKAGING TECHNOLOGIES II
(13:30-14:45) 13:30 (1) PROGRESS OF THREE-DIMENSIONAL INTEGRATION
TECHNOLOGY (INVITED) M. KOYANAGI, TOHOKU UNIV., JAPAN 422 14:00 (2) DEEP
TRENCH ETCHING IN SOI WAFER FOR THREE-DIMENSIONAL LSIS K.W. LEE, T.
NAKAMURA, Y. YAMADA, K.T. PARK, H. KURINO ANDM. KOYANAGI, TOHOKU UNIV.
JAPAN 424 * XXXN * 14:15 (3) FINE PITCH CSP TECHNOLOGY USINGAU BALL
BUMPS AS EXTERNAL TERMINALS S. NAKAJYO, M. ONODERA, M. IKUMO AND T.
KAWAHARA, FUJITSU, JAPAN 426 14:30 (4) DYNAMIC STRAIN AND ITS
DISTRIBUTION DURING ULTRASONIC FLIP CHIP BONDING M. HIZUKURI, N.
WATANABE AND T. ASANO, KYUSHU INST, OF TECHNOL., JAPAN 428 ROOM B B-7:
NEW MATERIALS AND CHARACTERIZATION -SURFACE AND INTERFACE CONTROL-
(9:00-10:30) 9:00 (1) NON-EQUILIBRIUM STRUCTURES OF SI/SI02 AND
SI/SIOXNY INTERFACES J. USHIO, J. SCHULTE* AND T. MARUIZUMI, HITACHI,
JAPAN AND *UNIV. OF TECHNOL., SYDNEY, AUSTRALIA 430 9:15 (2) CHEMICAL
STRUCTURES OF OXYNITRIDES/SI(100) INTERFACE H. KATO, K. TAKAHASHI, H.
NOHIRA, N. TAMURA*, K. HIKAZUTANI*, S. SANO* AND T. HATTORI, MUSASHI
INST, OF TECHNOL. AND *FUJITSU, JAPAN 432 9:30 (3) SI02/SI(111)
INTERFACE STRUCTURES FORMED BY ATOMIC OXYGEN K. TAKAHASHI, H. NOHIRA, T.
NAKAMURA, T. OHMI* AND T. HATTORI, MUSASHI INST, OF TECHNOL. AND *TOHOKU
UNIV., JAPAN 434 9:45 (4) ATOMIC SCALE CHARACTERIZATION OF NITRIDATION
PROCESS ON SI(100)-2XL SURFACES BY RADICAL NITROGEN D. MATSUSHITA, H.
IKEDA, A. SAKAI, S. ZAIMA AND Y. YASUDA, NAGOYA UNIV., JAPAN .. .436
10:00 (5) THEORETICAL CALCULATIONS FOR THE ELIMINATION OF SILANOL AND
DECREASE IN DIELECTRIC CONSTANT A. FUJIMOTO AND O. SUGIURA, TOKYO INST,
OF TECHNOL., JAPAN 438 10:15 (6) MOLECULAR ORBITAL CALCULATIONS OF
SULFUR DOPING REACTIONS IN DIAMOND CVD H. ZHOU, Y. YOKOI, H. TAMURA, K.
SUGISAKO, S. TAKAMI, M. KUBO, A. MIYAMOTO, A. IMAMURA*, M.N. GAMO** AND
T. ANDO**, TOHOKU UNIV., *HIROSHIMA KOKUSAI GAKUIN UNIV. AND **CREST,
JAPAN 440 B-8: NEW MATERIALS AND CHARACTERIZATION -NOVEL DEVICES AND
FABRICATION- (10:45-11:45) 10:45 (1) ION IRRADIATION STIMULATED CRYSTAL
NUCLEATION IN AMORPHOUS SI ON SI02 M. MIYAO, I. TSUNODA, T. SADOH AND A.
KENJO, KYUSHU UNIV., JAPAN 442 11:00 (2) SELECTIVE
SINGLE-CRYSTALLINE-SILICON GROWTH ON NON-ALKALI GLASS A. HARA AND N.
SASAKI, FUJITSU LABS., JAPAN 444 11:15 (3) HOT CARRIER EFFECT IN LOW
TEMPERATURE POLY-SILICON THIN FILM TRANSISTORS Y. URAOKA, T. HATAYAMA,
T. FUYUKI, T. KAWAMURA* AND Y. TSUCHIHASHI*, NARA INST. OF SCIENCE AND
TECHNOL. AND *MATSUSHITA ELECTRIC, JAPAN 446 11:30 (4) SIMPLE PROCESS
FOR BURIED NANOPYRAMID ARRAY (BNPA) FABRICATION BY MEANS OF DOPANT ION
IMPLANTATION AND DUALWET ETCHING M. KOH, T. GOTO, T. IIDA, A. SUGITA, T.
TANII, T. SHINADA, T. MATSUKAWA* AND I. OHDOMARI, WASEDA UNIV. AND *ETL,
JAPAN 448 LB-2: LATE NEWS 11:45 (1) SPECTROSCOPIC ELLIPSOMETRY FOR THE
IDENTIFICATION OF PARACRYSTALLITES IN THE ULTRA-THIN THERMAL CVD
HYDROGENATED AMORPHOUS SILICON FILMS S. HAZRA, I. SAKATA, M. YAMANAKA
AND E. SUZUKI, ETL, JAPAN 450 B-9: NEW MATERIALS AND CHARACTERIZATION
-METAL GATE AND NEW CHARACTERIZATION- (13:30-15:00) 13:30 (1) A
GUIDELINE FOR ACCURATE TWO-FREQUENCY CAPACITANCE MEASUREMENT FOR
ULTRA-THIN GATE OXIDES A. NARA, N. YASUDA, H. SATAKE AND A. TORIUMI,
TOSHIBA, JAPAN 452 13:45 (2) SPIN-DEPENDENT TRAP-ASSISTED TUNNELING
CURRENT IN ULTRA-THIN GATE DIELECTRICS Y. MIURA AND S. FUJIEDA, NEC,
JAPAN 454 * XXXIII * 14:00 (3) NON-DESTRUCTIVE AND CONTACTLESS
MONITORING TECHNIQUE OF SI SURFACE STRESS BY PHOTOREFLECTANCE M.
SOUGAWA, T. KANASHIMA,M. AGATA, K. YAMASHITA, M. OKUYAMA, A. FUJIMOTO*
AND K. ERIGUCHI**, OSAKA UNIV., *WAKAYAMA NATIONAL COLLEGE OF TECHNOL.
AND MATSUSHITA ELECTRONICS, JAPAN 456 14:15 (4) NOVEL METHOD OF
THRESHOLD VOLTAGE CONTROL OF METAL GATE CMOSFETS USING CHANNEL EPITAXY
W.S. KIM, S. SONG, Y. KHANG, T.H. CHOE, J.Y. YOO, N.I. LEE, K. FUJIHARA,
H.K. KANG AND J.T. MOON, SAMSUNG ELECTRONICS, KOREA 458 14:30 (5) LOW
RESISTIVITYPVD TANX/TA/TANX STACKED METAL GATECMOS TECHNOLOGY USING
SELF- GROWN 6CC-PHASED TANTALUM ON TANX BUFFER LAYER H. SHIMADA, I.
OHSHIMA, T. USHIKI, S. SUGAWA AND T. OHMI, TOHOKU UNIV., JAPAN.. .460
14:45 (6) CONFORMAL PLATINUM ELECTRODES PREPARED BY CHEMICAL VAPOR
DEPOSITION USING A LIQUID MECPPTME3 PRECURSOR IN AN OXIDIZING ATMOSPHERE
Y. MATSUI, M. HIRATANI, T. NABATAME, Y. SHIMAMOTO, K. IMAGAWA AND S.
KIMURA, HITACHI, JAPAN 462 ROOM C C-7: SILICON-ON-INSULATOR TECHNOLOGIES
I (9:00-10:30) 9:00 (1) PARTIALLY-DEPLETED SOI CMOS FOR
LOW-POWER-CONSUMPTION LSIS (INVITED) H. MIKOSHIBA AND M. HOGYOKU, SEIKO
EPSON, JAPAN 464 9:30 (2) LOW-POWER RF CIRCUITS IN SOI (INVITED) M.
HARADA, NTT, JAPAN 466 10:00 (3) ADVANCED CMOS TECHNOLOGY ON SAPPHIRE
SUBSTRATE FORRF SYSTEMS ON A CHIP Y.-C. TSENG, J. CABLE*, M. STUBER*, R.
REEDY* AND J.C.S. WOO, UNIV. OF CALIFORNIA AND *PEREGRINE SEMICONDUCTOR,
USA 468 10:15 (4) ON THETEMPERATURE DEPENDENCE OFHYSTERESIS EFFECT IN
FLOATING-BODY PARTIALLY-DEPLETED SOI CMOS CIRCUITS R. PURI, C.T. CHUANG,
M.B. KETCHEN, M.M. PELELLA* AND M.G. ROSENFIELD, IBM AND *UNIV. OF
FLORIDA, USA 470 C-8: SILICON-ON-INSULATOR TECHNOLOGIES II (10:45-12:15)
10:45 (1) A NOVEL FABRICATION TECHNIQUE OF ULTRA-THIN AND RELAXED SIGE
BUFFER LAYERS WITH HIGH GE CONTENT FOR SUB-100NM STRAINED
SILICON-ON-INSULATOR MOSFETS T. TEZUKA, N. SUGIYAMA, T. MIZUNO, M.
SUZUKI AND S. TAKAGI, TOSHIBA, JAPAN 472 11:00 (2) DESIGN OF SIGE/BURIED
OXIDE LAYERED STRUCTURE TO FORM HIGHLY STRAINED SI LAYER ON INSULATOR
FOR SOI MOSFETS N. SUGIYAMA, T. MIZUNO, M. SUZUKI AND S. TAKAGI,
TOSHIBA, JAPAN 474 11:15 (3) OPTIMIZATION OF SELECTIVE EPITAXY PROCESS
FOR ELEVATED SOURCE/DRAIN APPLICABLE TO 0.15 [IM FULLY DEPLETED CMOS ON
25NM SOI T. NAKAMURA, H. MATSUHASHI, Y. KATAKURA AND J. KANAMORI, OKI
ELECTRIC, JAPAN 476 11:30 (4) ADVANCED CO SALICIDE TECHNOLOGY FOR
SUB-0.20 /;M FD-SOI DEVICES T. ICHIMORI, N. HIRASHITA AND J. KANAMORI,
OKI ELECTRIC, JAPAN 478 11:45 (5) PROPOSAL OF A
PARTIAL-GROUND-PLANE(PGP) SILICON-ON-INSULATOR(SOI)MOSFET FOR DEEP
SUB-100-NM CHANNEL REGIME S. YANAGI, A. NAKAKUBO AND Y. OMURA, KANSAI
UNIV., JAPAN 480 12:00 (6) REDUCED REVERSE NARROW CHANNEL EFFECT IN THIN
SOI NMOSFET S S.J. CHANG, C.Y. CHANG, S.D.WU, T.Y. HUANG AND T.S. CHAO*.
NATIONAL CHIAOTUNG UNIV. AND *NATIONAL NANO DEVICE LABS., TAIWAN 482
LC-2: LATE NEWS 12:15 (1) COMPARISON IN SPLITTING BONDED SOI BY SOLID
AND FLUID WEDGES (WATER AND AIR JETS) K. SAKAGUCHI, K. YANAGITA, H.
KURISU, H. SUZUKI, K. OHMI AND T. YONEHARA, CANON, JAPAN 484 * XXXIV *
C-9: SILICON-ON-INSULATOR TECHNOLOGIES III (13:15-15:00) 13:15 (1) A
SINGLE CHIP AUTOMOTIVE CONTROL LSI USING SOI BICDMOS K. KAWAMOTO, S.
MIZUNO, H. ABE, Y. HIGUCHI, S. FUJINO AND I. SHIRAKAWA*, DENSO AND
*OSAKA UNIV., JAPAN 486 13:30 (2) SOI-MOS/DIODE COMPOSITE PHOTODETECTOR
DEVICE Y. URYU ANDT. ASANO, KYUSHU INST, OF TECHNOL., JAPAN 488 13:45
(3) SUBSTRATE CHARACTERISTICS OF NANOCLEAVE SOI WAFERS (INVITED) I.J.
MALIK, S.W. BEDELL, H. KIRK, M. KOROLIK, S. KANG, M.I. CURRENT AND F.J.
HENLEY, SILICON GENESIS, USA 490 14:15 (4) EVALUATION OF SOI SUBSTRATES
BY POSITRON ANNIHILATION A. OGURA, A. UEDONO* AND S. TANIGAWA*, NEC AND
*UNIV. OF TSUKUBA, JAPAN 492 14:30 (5) CHARGING DAMAGE OF SOI WAFER
DIAGNOSED BY SCANNING MAXWELL-STRESS MICROSCOPY T. MATSUKAWA, H. FUJII*,
S. KANEMARU, M. NAGAO, H. YOKOYAMA AND J. ITOH, ETL AND *KOBE STEEL,
JAPAN 494 14:45 (6) THERMALLY-INDUCED STRUCTURAL CHANGES OF ULTRATHIN
SILICON-ON-INSULATOR STRUCTURE R. NURYADI, Y. ISHIKAWA AND M. TABE,
SHIZUOKA UNIV., JAPAN 496 ROOM D D-7: COMPOUND SEMICONDUCTOR MATERIALS
AND DEVICE PROCESSES I (9:00-10:30) 9:00 (1) MODERN PROCESSING
TECHNOLOGY FOR 6-INCHGAAS WAFERS (INVITED) A. MCCANN, G. GUTH AND B.
BAYRAKTAROGLU, ANADIGICS, USA 498 9:30 (2) IN-SITU XPS STUDY OFETCH
CHEMISTRY OF METHANE-BASED RIBE OF INP USING N2 Z. JIN, H. TAKAHASHI, T.
HASHIZUME AND H. HASEGAWA, HOKKAIDO UNIV., JAPAN 500 9:45 (3) VERTICAL
HIGH QUALITY MIRRORLIKE FACET OF GAN-BASED DEVICE BY REACTIVE ION
ETCHING C.H. CHEN, Y.K. SU, S.J. CHANG, J.K. SHEU ANDI.C. LIN,NATIONAL
CHENGKUNG UNIV., TAIWAN 502 10:00 (4) LATERAL THICKNESS MODULATION OF
INGAAS/GAAS STRUCTURES BY SELECTIVE AREAMOVPE T. TERASAWA, F. NAKAJIMA,
J. MOTOHISA AND T. FUKUI, HOKKAIDO UNIV., JAPAN 504 10:15 (5) NITROGEN
DOPING INTO CU20 THIN FILMS DEPOSITED BY REACTIVE SPUTTERINGMETHOD S.
ISHIZUKA, S. KATO, T. MARUYAMA AND K. AKIMOTO, UNIV. OF TSUKUBA, JAPAN
506 D-8: COMPOUND SEMICONDUCTOR MATERIALS AND CHARACTERIZATION
(10:45-12:00) 10:45 (1) FIELD EFFECT PHOTOLUMINESCENCE FROM EXCITONS
BOUND TO NITROGEN PAIRS INGAAS K. ONOMITSU, T. OKABE, T. MAKIMOTO*, H.
SAITO* AND Y. HORIKOSHI, WASEDA UNIV. AND *NTT, JAPAN 508 11:00 (2)
STRAIN RELAXATION MECHANISM INTHE GROWTH OF INAS ON GAAS(LLO) SURFACES
STUDIED BY SCANNING TUNNELING MICROSCOPY H. YAMAGUCHI AND N. OYAMA*, NTT
AND * KEIO UNIV., JAPAN 510 11:15 (3) INITIAL STAGE OF INGAAS GROWTH ON
GAAS MULTIATOMIC STEPS BY MOVPE S. LEE, M. AKABORI, T. SHIRAHATA*, J.
MOTOHISA AND T. FUKUI, HOKKAIDO UNIV. AND AIR WATER, JAPAN 512 11:30 (4)
FABRICATION OF PERIODICALLY DOMAIN-INVERTED ALGAAS QUASI-PHASE-MATCHED
DEVICES BY GAAS/GE/GAAS SUBLATTICE REVERSAL EPITAXY S. KOH, T. KONDO, Y.
SHIRAKI AND R. ITO*, UNIV. OF TOKYO AND MEIJI UNIV., JAPAN... 514 11:45
(5) RESONANCE-INDUCED MODIFICATION OF SPATIALLY DIRECT AND INDIRECT
STARK LADDER TRANSITIONS IN A GAAS/ALAS SUPERLATTICE P-I-N DIODE T.
NOGAMI, T. TAKEDA AND K. FUJIWARA, KYUSHU INST, OF TECHNOL., JAPAN 516
D-9: COMPOUND SEMICONDUCTOR MATERIALS AND DEVICE PROCESSES II
(13:00-15:00) 13:30 (1) DEVICE TECHNOLOGY FOR INP/INGAAS HBT LIGHTWAVE
COMMUNICATION ICS (INVITED) S. YAMAHATA, M. IDA, N. WATANABE, K.
KURISHIMA, H. NAKAJIMA AND E. SANO, NTT, JAPAN 518 * XXXV * 14:00 (2)
HIGH LINEARITY AND HIGH POWER DEVICE FABRICATED BY
AL0.3GAO.7AS/INO.I5GAO.85AS DOUBLE DOPED-CHANNEL HETEROSTRUCTURE F.-T.
CHIEN AND Y.-J. CHAN*, CHINO-EXCEL TECHNOL. AND *NATIONAL CENTRAL UNIV.,
TAIWAN 520 14:15 (3) HIGH-LINEARITY AND CURRENT-ENHANCEMENT CAMEL-GATE
FIELD EFFECT TRANSISTOR UTILIZING 5- DOPING CHANNELS J.-H. TSAI, CHIEN
KUO INST, OF TECHNOL., TAIWAN 522 14:30 (4) A THERMAL RESISTANCE
MEASUREMENT OF HBT WITH PULSED CURRENT I-V SETUP AND ITS SCALABILITY
WITH THE TOTAL EMITTER AREA H.-M. PARK, S.-H. CHEON AND S. HONG, KAIST,
KOREA 524 14:45 (5) DLTS, PL AND CL STUDY OF DOMINANT DEEP LEVEL AND ITS
REMOVAL IN INGAP/GAAS HETEROSTRUCTURE GROWN BY TBP-BASEDGSMBE F.
ISHIKAWA, A. HIRAMA AND H. HASEGAWA, HOKKAIDO UNIV., JAPAN 526 ROOM E
E-7: PHOTONIC INTEGRATION AND PACKAGING I (9:00-10:30) 9:00 (1) TERABIT
PHOTONIC NETWORKS USINGOADM AND OXC NODES (INVITED) H. ONAKA, FUJITSU
LABS., JAPAN 528 9:30 (2) MEMS AND OPTICAL APPLICATIONS (INVITED) H.
FUJITA AND H. TOSHIYOSHI, UNIV. OF TOKYO, JAPAN 530 10:00 (3) PLC-TYPE
HYBRID EXTERNAL CAVITY LASER INTEGRATED WITH A FRONT-MONITOR PD ON A SI
PLATFORM T. TANAKA, Y. HIBINO, T. HASHIMOTO, R. KASAHARA, Y. INOUE, A.
HIMENO, M. ITO, M. ABE AND Y. TOHMORI, NTT, JAPAN 532 10:15 (4) HYBRID
INTEGRATED 8-CHANNEL SOAG RECEPTACLEMODULE WITH DRIVER CIRCUITS T.
SUGIMOTO, T. KATO, J. SASAKI, T. SHIMODA, H. HATAKEYAMA, T. TAMANUKI, T.
SASAKI AND M. ITOH, NEC, JAPAN 534 E-8: PHOTONIC INTEGRATION AND
PACKAGING II (10:45-12:00) 10:45 (1) SILICA-BASED PLANAR LIGHTWAVE
CIRCUITS FOR THE FUTURE PHOTONIC NETWORKS (INVITED) A. HIMENO, NTT,
JAPAN 536 11:15 (2) WIDE-BAND THERMO-OPTIC WAVELENGTH TUNABLE FILTER
USING SILICONE RESIN WITH A FAST RESPONSE FORWDM SYSTEMS S. TOYODA, N.
OOBA, A. KANEKO, M. HIKITA, T. KURIHARA, A. TATE AND T. MARUNO, NTT,
JAPAN 538 11:30 (3) FLAT PASSBAND AND LOW CROSSTALK 32CH-50GHZ SPACING
MULTIPLEXER/DEMULTIPLEXER COMBINED BY TWO 100 GHZ SPACINGAWGS ANDFBGS T.
SAITO, T. OTA, H. OGOSHI AND T. TSUDA, FURUKAWA ELECTRIC, JAPAN 540
11:45 (4) A NOVEL LITHOGRAPHIC METHOD FOR FABRICATING THREE DIMENSIONAL
PERIODIC STACKS T. MATSUURA, K. MATSUDA AND J. MUROTA, TOHOKU UNIV.,
JAPAN 542 LE-2: LATE NEWS 13:30 (1) INTRINSIC GETTERING IN NITROGEN
DOPED AND HYDROGEN ANNEALED CZOCHRALSKI-GROWN SILICON WAFERS H. GOTO,
L.-S. PAN, M. TANAKA AND K. KASHIMA, TOSHIBA CERAMICS, JAPAN 544 13:45
(2) PERFORMANCE OF SUBMICRON LARGE-GRAIN POLYSILICON-ON-INSULATOR
(LPSOI) MOSFETS FORMED BY CRYSTALLIZATION OF AMORPHOUS SILICON M. CHAN,
H. WANG AND S. JAGAR, HONG KONG UNIV. OF SCI.& TECHNOL., HONG KONG...
546 14:00 (3) INVESTIGATION ON RELIABILITY OF HIGH QUALITY ULTRA-THIN
ISSG OXIDES T.Y. LUO, G.A. BROWN* AND A.L.P. ROTONDARO**, UNIV. OF
TEXAS, *INTERNATIONAL SEMATECH AND **TEXAS INSTRUMENTS, USA 548 14:15
(4) THE EFFECT OF ORGANIC COMPOUNDS CONTAMINATION ON THE ELECTRICAL
CHARACTERISTICS OF ULTRA-THIN GATE OXIDE FILMS Y. WAKAYAMA, T. OHKAWA,
O. NAKAMURA, S. KOBAYASHI*, S. SUGAWA, H. AHARONI AND T. OHMI, TOHOKU
UNIV. AND *TAISEI, JAPAN 550 * XXXVI * 14:30 (5) INFLUENCE OFORGANIC
CONTAMINANT ON BREAKDOWN CHARACTERISTICS OFMOS CAPACITORS WITH THIN SI02
T. YOSHINO, S. YOKOYAMA, T. SUZUKI* AND T. FUJII*, HIROSHIMA UNIV. AND
*EBARA, JAPAN 552 14:45 (6) SUB-2NM EQUIVALENT SI02 THICKNESS TA205 FOR
GATE DIELECTRIC USING RTA+UV/03 A. YAMAGUCHI, T. AOYAMA AND T. SUGII,
FUJITSU LABS., JAPAN 554 * XXXVN *
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| spelling | International Conference on Solid State Devices and Materials 2000 Sendai Verfasser (DE-588)6024593-1 aut Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center sponsored by the Japan Society of Applied Physics. Technical co-sponsored by IEEE Electron Devices Society ... [Chairperson: Tadahiro Ohmi] Tokyo Business Center for Academic Societies Japan 2000 XXXVII, 565 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Literaturangaben Semiconductors Congresses Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 2000 Sendai gnd-content Integrierte Schaltung (DE-588)4027242-4 s DE-604 Ohmi, Tadahiro Sonstige oth Ōyō-Butsuri-Gakkai Sonstige (DE-588)20046-3 oth IEEE Electron Devices Society Sonstige (DE-588)121920-0 oth http://www.gbv.de/dms/tib-ub-hannover/323014879.pdf lizenzfrei Inhaltsverzeichnis GBV Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018659057&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center Semiconductors Congresses Integrierte Schaltung (DE-588)4027242-4 gnd |
| subject_GND | (DE-588)4027242-4 (DE-588)1071861417 |
| title | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center |
| title_auth | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center |
| title_exact_search | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center |
| title_full | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center sponsored by the Japan Society of Applied Physics. Technical co-sponsored by IEEE Electron Devices Society ... [Chairperson: Tadahiro Ohmi] |
| title_fullStr | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center sponsored by the Japan Society of Applied Physics. Technical co-sponsored by IEEE Electron Devices Society ... [Chairperson: Tadahiro Ohmi] |
| title_full_unstemmed | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials August 29 - 31. 2000, Sendai, Sendai International Center sponsored by the Japan Society of Applied Physics. Technical co-sponsored by IEEE Electron Devices Society ... [Chairperson: Tadahiro Ohmi] |
| title_short | Extended abstracts of the 2000 International Conference on Solid State Devices and Materials |
| title_sort | extended abstracts of the 2000 international conference on solid state devices and materials august 29 31 2000 sendai sendai international center |
| title_sub | August 29 - 31. 2000, Sendai, Sendai International Center |
| topic | Semiconductors Congresses Integrierte Schaltung (DE-588)4027242-4 gnd |
| topic_facet | Semiconductors Congresses Integrierte Schaltung Konferenzschrift 2000 Sendai |
| url | http://www.gbv.de/dms/tib-ub-hannover/323014879.pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=018659057&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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