Design, Analysis and Test of Logic Circuits under Uncertainty:
Gespeichert in:
| Hauptverfasser: | , , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Dordrecht
Springer
2013
|
| Schriftenreihe: | Lecture Notes in Electrical Engineering
115 |
| Online-Zugang: | Inhaltstext |
| Beschreibung: | XI, 123 S. Ill., graph. Darst. |
| ISBN: | 9789048196432 |
Internformat
MARC
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| 100 | 1 | |a Krishnaswamy, Smita |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Design, Analysis and Test of Logic Circuits under Uncertainty |c Smita Krishnaswamy ; Igor L. Markov ; John P. Hayes |
| 264 | 1 | |a Dordrecht |b Springer |c 2013 | |
| 300 | |a XI, 123 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
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| 490 | 1 | |a Lecture Notes in Electrical Engineering |v 115 | |
| 700 | 1 | |a Markov, Igor L. |d 1973- |e Verfasser |0 (DE-588)137299354 |4 aut | |
| 700 | 1 | |a Hayes, John Patrick |d 1944- |e Verfasser |0 (DE-588)172129753 |4 aut | |
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Datensatz im Suchindex
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| author | Krishnaswamy, Smita Markov, Igor L. 1973- Hayes, John Patrick 1944- |
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| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Maschinenbau / Maschinenwesen Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV042339218 |
| illustrated | Illustrated |
| indexdate | 2024-08-03T02:09:29Z |
| institution | BVB |
| isbn | 9789048196432 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-027775779 |
| oclc_num | 819807915 |
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| owner_facet | DE-29T |
| physical | XI, 123 S. Ill., graph. Darst. |
| publishDate | 2013 |
| publishDateSearch | 2013 |
| publishDateSort | 2013 |
| publisher | Springer |
| record_format | marc |
| series | Lecture Notes in Electrical Engineering |
| series2 | Lecture Notes in Electrical Engineering |
| spelling | Krishnaswamy, Smita Verfasser aut Design, Analysis and Test of Logic Circuits under Uncertainty Smita Krishnaswamy ; Igor L. Markov ; John P. Hayes Dordrecht Springer 2013 XI, 123 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Lecture Notes in Electrical Engineering 115 Markov, Igor L. 1973- Verfasser (DE-588)137299354 aut Hayes, John Patrick 1944- Verfasser (DE-588)172129753 aut Erscheint auch als Online-Ausgabe 978-90-481-9644-9 Lecture Notes in Electrical Engineering 115 (DE-604)BV022422356 115 text/html http://deposit.dnb.de/cgi-bin/dokserv?id=3484942&prov=M&dok_var=1&dok_ext=htm Inhaltstext |
| spellingShingle | Krishnaswamy, Smita Markov, Igor L. 1973- Hayes, John Patrick 1944- Design, Analysis and Test of Logic Circuits under Uncertainty Lecture Notes in Electrical Engineering |
| title | Design, Analysis and Test of Logic Circuits under Uncertainty |
| title_auth | Design, Analysis and Test of Logic Circuits under Uncertainty |
| title_exact_search | Design, Analysis and Test of Logic Circuits under Uncertainty |
| title_full | Design, Analysis and Test of Logic Circuits under Uncertainty Smita Krishnaswamy ; Igor L. Markov ; John P. Hayes |
| title_fullStr | Design, Analysis and Test of Logic Circuits under Uncertainty Smita Krishnaswamy ; Igor L. Markov ; John P. Hayes |
| title_full_unstemmed | Design, Analysis and Test of Logic Circuits under Uncertainty Smita Krishnaswamy ; Igor L. Markov ; John P. Hayes |
| title_short | Design, Analysis and Test of Logic Circuits under Uncertainty |
| title_sort | design analysis and test of logic circuits under uncertainty |
| url | http://deposit.dnb.de/cgi-bin/dokserv?id=3484942&prov=M&dok_var=1&dok_ext=htm |
| volume_link | (DE-604)BV022422356 |
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