Showing 1 - 13 results of 13 for search 'Devadas, Srinivas', query time: 0.05s
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These are marked with the "Interlibrary loan" label and can be ordered by clicking on them.
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1
Secure processors part II Intel SGX security analysis and MIT Sanctum architecture by Costan, Victor, Lebedev, Ilia, Devadas, Srinivas 1963-
Published 2017Call Number: Loading…
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Exact algorithms for output encoding, state assignment and four-level boolean minimization by Devadas, Srinivas 1963-, Newton, A. R.
Published 1989Call Number: Loading…
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Techniques for optimization-based synthesis of digital systems by Devadas, Srinivas 1963-
Published 1989Call Number: Loading…
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4
Secure processors part I background, taxonomy for secure enclaves and Intel SGX architecture by Costan, Victor, Lebedev, Ilia, Devadas, Srinivas 1963-
Published 2017Call Number: Loading…
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Computer-Aided Design Techniques for Low Power Sequential Logic Circuits by Monteiro, José, Devadas, Srinivas
Published 1997Call Number: Loading…Get full text
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6
Sequential logic testing and verification by Ghosh, Abhijit, Devadas, Srinivas 1963-, Newton, Arthur R.
Published 1992Call Number: Loading…
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Programming for the puzzled learn to program while solving puzzles by Devadas, Srinivas 1963-
Published 2017Call Number: Loading…Indexes
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8
Computer aided design techniques for low power sequential logic circuits by Monteiro, José, Devadas, Srinivas 1963-
Published 1997Call Number: Loading…
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Logic synthesis by Devadas, Srinivas 1963-, Ghosh, Abhijit, Keutzer, Kurt
Published 1994Call Number: Loading…
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Sequential logic synthesis by Ashar, Pranav, Devadas, Srinivas 1963-, Newton, Arthur R.
Published 1992Call Number: Loading…
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11
Sequential Logic Synthesis by Ashar, Pranav, Devadas, Srinivas, Newton, A. Richard
Published 1992Call Number: Loading…Get full text
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12
Sequential Logic Testing and Verification by Ghosh, Abhijit, Devadas, Srinivas, Newton, A. Richard
Published 1992Call Number: Loading…Get full text
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13
VLSI: Systems on a Chip IFIP TC10 WG10.5 Tenth International Conference on Very Large Scale Integration (VLSI ’99) December 1–4, 1999, Lisboa, Portugal
Published 2000Other Authors:Call Number: Loading…Get full text
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